Global ETD Search

Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.

Results

Showing 1 to 5 of 5 for “"wafer-level packaging"”.

  1. Design, Fabrication and Testing of Conformal, Localized Wafer-level Packaging for RF MEMS Devices

    A low-cost, low-temperature packaging concept is proposed for localized sealing and control of the ambient of a device cavity appropriate for Radio-Frequency (RF) Micro- Electro-Mechanical (MEMS) devices, such as resonators and switches. These devices require application specific packaging to …

    vt Repository record for Design, Fabrication and Testing of Conformal, Localized Wafer-level Packaging for RF MEMS Devices (opens in a new tab)

  2. Mixed-domain simulation and hybrid wafer-level packaging of RF-MEMS devices for wireless applications

    … di un processo di fabbricazione ad-hoc per il packaging e l’integrazione degli stessi. Riguardo al primo argomento, sarà mostrato nel dettaglio lo sviluppo di una libreria di modelli MEMS all’interno dell’ambiente di simulazione per circuiti integrati Cadence c . L’approccio scelto per la …

    bologna Repository record for Mixed-domain simulation and hybrid wafer-level packaging of RF-MEMS devices for wireless applications (opens in a new tab)

  3. A Silicate-Based Packaging Material for 3-D Heterogeneous Integration of Microsystems

    3D heterogeneous integration (HI) and wafer-level packaging (WLP) represent the cutting edge of microelectronics design and fabrication. However, the current limitations of microelectronics packaging materials inhibit the widespread implementation of these processes, which presents an opportunity …

    mit Repository record for A Silicate-Based Packaging Material for 3-D Heterogeneous Integration of Microsystems (opens in a new tab)

  4. Packaging of the MIT Microengine

    … thesis covers the development and testing of the packaging needed for the microengine and related devices. The packaging of the microengine includes the fluidic, electrical, and sensor connections that interface the engine with the supplies and instruments necessary for operation. Making …

    mit Repository record for Packaging of the MIT Microengine (opens in a new tab)

  5. Analysis of column interconnects for wafer level packages

    … analysis of Copper column (CuC) interconnect for wafer level packages. First, a simulation-based design optimization process was established based on ABAQUS and Minitab. This process integrated finite element simulation, design of experiment and numerical optimization, generating a systematic and …

    nus Repository record for Analysis of column interconnects for wafer level packages (opens in a new tab)