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Showing 1 to 14 of 14 for “"threshold logic"”.

  1. Pseudo-Threshold Logic: A Generalization of Threshold Logic

    Made available in DSpace on 2014-12-08T22:54:50Z (GMT). No. of bitstreams: 1 7105039.pdf: 9727742 bytes, checksum: 59cc33f87a759d40491c6220d47cc582 (MD5) Previous issue date: 1970

    uiuc Repository record for Pseudo-Threshold Logic: A Generalization of Threshold Logic (opens in a new tab)

  2. Multi-Threshold Threshold Logic

    Made available in DSpace on 2014-12-08T22:24:08Z (GMT). No. of bitstreams: 1 6706782.pdf: 1956941 bytes, checksum: 2d859c8c1fb64bb028a7b32de7a4cde6 (MD5) Previous issue date: 1966

    uiuc Repository record for Multi-Threshold Threshold Logic (opens in a new tab)

  3. Design of High Performance Threshold Logic Gates

    Threshold logic gates are gaining more importance in recent years due to significant development in switching devices. This renewed the interest in high performance and low power circuits with threshold logic gates. Threshold Logic Gates can be implemented using both the traditional CMOS …

    siu-theses Repository record for Design of High Performance Threshold Logic Gates (opens in a new tab)

  4. SYNTHESIS AND TESTING OF THRESHOLD LOGIC CIRCUITS

    Threshold logic gates gaining more importance in recent years due to the significant development in the switching devices. This renewed the interest in synthesis and testing of circuits with threshold logic gates. Two important synthesis considerations of threshold logic circuits are addressed …

    siu-theses Repository record for SYNTHESIS AND TESTING OF THRESHOLD LOGIC CIRCUITS (opens in a new tab)

  5. Novel RTD-Based Threshold Logic Design and Verification

    … RTDs are intrinsically suitable for implementing threshold logic rather than Boolean logic which has dominated CMOS technology in the past. To fully take advantage of such emerging nanotechnology, efficient design methodologies and design automation tools for threshold logic therefore become …

    vt Repository record for Novel RTD-Based Threshold Logic Design and Verification (opens in a new tab)

  6. COPING WITH DISCREPANCIES OF THE MANUFACTURED WEIGHTS IN THRESHOLD LOGIC GATES

    Threshold Logic technology is conceived as the crucial alternate emerging technology to CMOS implementation in nanoelectronic era and the realization of complex functionalities is becoming an increasingly promising approach in the deep sub-micron design era. The gate that is implemented with …

    siu-theses Repository record for COPING WITH DISCREPANCIES OF THE MANUFACTURED WEIGHTS IN THRESHOLD LOGIC GATES (opens in a new tab)

  7. REPROGRAMMABLE THRESHOLD LOGIC GATES BASED ON RANDOM NANOSTRUCTURED NETWORKS FOR ALGEBRAIC AND LOGIC BOOLEAN COMPUTATION

    … demonstrated the remarkable advantages of threshold logic (TL), but to this day many limits hampered TL’s commercial success. While memristors have demonstrated that memory need not be separated from computation, the fine-tuning of their analog conductance appears to cut out all the …

    milano Repository record for REPROGRAMMABLE THRESHOLD LOGIC GATES BASED ON RANDOM NANOSTRUCTURED NETWORKS FOR ALGEBRAIC AND LOGIC BOOLEAN COMPUTATION (opens in a new tab)

  8. DESIGN AND TEST OF DIGITAL CIRCUITS AND SYSTEMS USING CMOS AND EMERGING RESISTIVE DEVICES

    … memory, Boolean implementation, computing, and logic systems. This dissertation focuses on testing and design of such applications. In particular, we investigate on testing of memristor-based memories, design of memristive implementation of Boolean functions, and reliability and design of …

    siu-theses Repository record for DESIGN AND TEST OF DIGITAL CIRCUITS AND SYSTEMS USING CMOS AND EMERGING RESISTIVE DEVICES (opens in a new tab)

  9. Circuit Design Methods with Emerging Nanotechnologies

    … capability for implementing non-conventional logic such as threshold logic and reversible logic; ii) due to the density and size factors of nano-devices, the defect rate of nanoelectronic system is much higher than conventional CMOS systems, therefore existing design paradigms cannot guarantee …

    vt Repository record for Circuit Design Methods with Emerging Nanotechnologies (opens in a new tab)

  10. Development of an adaptive weight unit.

    … constructed and were used in conjuction with a threshold logic unit in order to demonstrate the dynamic characteristics of the weight units. Simple tests were carried out on this system and the results are presented. Conclusions are drawn as to the success of the design.

    ottawa-retro Repository record for Development of an adaptive weight unit. (opens in a new tab)

  11. Robust hardware elements for weightless artificial neural networks

    … initially reviews the building blocks of physiological neural systems and then chronologically describes the development of weightless artificial neural systems. Several new design methodologies for the implementation of robust binary sum-and-threshold neurons are presented. The new techniques …

    cent-lancashire Repository record for Robust hardware elements for weightless artificial neural networks (opens in a new tab)

  12. BOOLEAN AND BRAIN-INSPIRED COMPUTING USING SPIN-TRANSFER TORQUE DEVICES

    … can be explored in compact, low power memory and logic design. In order to truly leverage STT devices based computing, researchers require a re-think of circuit, architecture, and computing model, since the STT devices are unlikely to be drop-in replacements for CMOS. The potential of STT devices …

    purdue-thes Repository record for BOOLEAN AND BRAIN-INSPIRED COMPUTING USING SPIN-TRANSFER TORQUE DEVICES (opens in a new tab)

  13. SCALABLE BUS ENCODING FOR ERROR-RESILIENT HIGH-SPEED ON-CHIP COMMUNICATION

    … have demonstrated that use of multiple threshold voltages improves the performance of a bus significantly. The multi-threshold capture mechanism takes advantage of predictable temporal behavior of a tightly coupled bus to predict the next state of the bus early. However, Use of multiple …

    siu-theses Repository record for SCALABLE BUS ENCODING FOR ERROR-RESILIENT HIGH-SPEED ON-CHIP COMMUNICATION (opens in a new tab)