Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
Results
Showing 1 to 20 of 105 for “"test generation"”.
-
Test Generation for Microprocessors
Made available in DSpace on 2014-12-12T20:55:02Z (GMT). No. of bitstreams: 1 8004286.pdf: 5848115 bytes, checksum: 469220329fd45919c5ce7f720fb7bcc5 (MD5) Previous issue date: 1979
-
Improving Automated Android Test Generation
… developing such apps. Thus, it is essential to tests apps properly before they are released onto the market. However, testing manually is often not only too cost-intensive but also too time-consuming in the short development phase, thus an automated solution is preferred. Testing mobile apps …
-
Hierarchical test generation for CMOS circuits
… styles and fabrication processes, traditional test generation techniques fail to adequately address the problems of how to (l) accurately represent the structure of design styles and physical faults, and (2) manage the high computational costs and memory resource requirements caused by the …
-
An improved chip-level test generation algorithm
An improved algorithm for the automatic generation of test vectors from chip-level descriptions written in VHDL is described. The method offers an order of magnitude speed improvement over earlier test generation algorithms. The algorithm accepts data flow circuit descriptions written in a subset …
-
SCALABLE TEST GENERATION FOR PATH DELAY FAULTS
… a subset of critical paths are chosen for testing purposes [2]. Path intensive circuits contain a large number of critical paths whose delays affect the performance of the circuit. This dissertation presents three techniques to improve test generation for path delay faults. The first …
-
Sequential Circuit Test Generation Using Genetic Techniques
… synchronizing sequences can greatly benefit test generation. Finding these sequences, however, is nontrivial. The GA is applied to find short synchronizing sequences, and applications of these sequences are also discussed.
-
Automatic Test Generation Techniques for Sequential Circuits
Finally, a GA-based diagnostic test generation approach is proposed for sequential circuits. A simple GA, which interacts with an efficient diagnostic fault simulator, is proposed to target groups of undistinguished fault pairs iteratively. Efficient data structures are used and heuristics are …
-
Architectural Level Test Generation and Fault Simulation
… is proposed to overcome the difficulties. The test generation process is separated into two phases. An instruction sequence assembling methodology is developed in the first phase to search for a valid instruction sequence for the injected test vector of the module under test. In the second …
-
Techniques for sequential circuit automatic test generation
Test pattern generation has progressed to a stage at which automatic test generation gives satisfactory fault coverage on almost any combinational circuit. However, the same is not true of sequential circuit test generation. While scan-based approaches can convert the sequential circuit into a …
-
Hierarchical test generation for VHDL behavioral models
In this thesis, several techniques for the test generation of VHDL behavioral models are proposed. An algorithm called HBTG, Hierarchical Behavioral Test Generator, is developed and implemented to systematically generate tests for VHDL behavioral models. HBTG accepts the Process Model Graph and the …
-
A formal model for behavioral test generation
A formal behavioral test generation algorithm, called the B-algorithm, is presented together with a behavioral VHDL model and a realistic behavioral fault model. Using the behavioral VHDL model, a behavioral VHDL circuit description is represented as a set of equivalent process Statements and …
-
Behavioral delay fault modeling and test generation
… of VLSI devices has increased, delay fault testing has become a more important factor in VLSI testing. Due to the large number of gates in a VLSI circuit, the gate level test generation methodologies may become infeasible for delay test generation. In this work, a new behavioral delay fault …
-
Fail-Safe Test Generation of Safety Critical Systems
<p>This dissertation introduces a technique for testing proper failure mitigation in safety critical systems. Unlike other approaches which integrate behavioral and failure models, and then generate tests from the integrated model, we build safety mitigation tests from an existing behavioral test …
-
Parallel algorithms for test generation and fault simulation
… correct operation of a digital circuit. Since test generation and fault simulation for circuits of VLSI complexity can take a prohibitive amount of time, speeding up test generation and fault simulation algorithms by either using better uniprocessor heuristics or by using the tremendous …
-
Techniques to speedup test generation for VLSI circuits
… of logic circuits has made the problem of test generation intractable. In this dissertation we investigate three different techniques to speed up the test generation process. The first approach attempts to exploit the hierarchy inherent in any complex digital design. An intermediate …
-
Strategies for Scalable Symbolic Execution-based Test Generation
… and constraint solving techniques, several test generation tools use variants of symbolic execution. Symbolic techniques have been shown to be very effective in path-based test generation; however, they fail to scale to large programs due to the exponential number of paths to be explored. In …
-
Guiding RTL Test Generation Using Relevant Potential Invariants
… in a simulation-based swarmintelligence-based test generation technique to generate relevant test vectors for design validation at the Register Transfer Level (RTL). Providing useful guidance to the test generator for such techniques is critical. In our approach, we provide guidance by …
-
RTL Functional Test Generation Using Factored Concolic Execution
This thesis presents a novel concolic testing methodology and CORT, a test generation framework that uses it for high-level functional test generation. The test generation effort is visualized as the systematic unraveling of the control-flow response of the design over multiple (factored) …
-
Process level test generation for VHDL behavioral models
… thesis describes the development of the Process Test Generation (PTG) software for the testing of single-process VHDL behavioral models. The PTG software, along with Hierarchical Behavioral Test Generator (HBTG) and Modeler's Assistant, forms a part of the Automatic Test Generation System being …
-
Effective Heuristic-based Test Generation Techniques for Concurrent Software
… them to be reliable and correct. Software testing is the predominant approach in industry for finding software errors. There has been a great advance in testing sequential programs throughout the past decades. Several techniques have been introduced with the aim of automatically generating …
Page 1 of 6