Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
Results
Showing 1 to 6 of 6 for “"symbolic simulation"”.
-
Advancing architecture optimizations with Bespoke Analysis and Machine Learning
… application-based constraints in gate-level simulation to reveal opportunities to optimize a processor at the design level. While this can significantly improve energy efficiency, if the goal is truly to maximize energy efficiency, it is important to consider not only design-level …
-
RTL Functional Test Generation Using Factored Concolic Execution
… Then, we perform an interleaved cycle-by-cycle symbolic evaluation over the concrete execution trace extracted from the Control Flow Graph (CFG) of the design. The purpose of this task is to dynamically discover means to divert the control flow of the system, by mutating primary-input stimulated …
-
Exploring Abstraction Techniques for Scalable Bit-Precise Verification of Embedded Software
… verified. Next, we present a method of using symbolic simulation for scalable formal verification. The simulation involves distinguishing X as symbolic values to abstract concrete variables' values. Also, the method embeds this symbolic simulation in a counterexample-guided …
-
Low-Power-Driven Synthesis Algorithms for Sequential and Combinational Circuits
… resynthesize sequential machines. We propose a symbolic simulation-based algorithm to extract the self-loops of the underlying FSM. We partition the sequential machine and apply the above clockgating technique. Third, we propose a synthesis methodology that uses algebraic techniques like kernel …
-
Untestable Fault Identification Using Implications
Untestable faults in circuits are defects/faults for which there exists no test pattern that can either excite the fault or propagate the fault effect to an observable point, which could be either a Primary output (PO) or a scan flip-flop. The current state-of-the-art automatic test pattern …
-
Dependable design for low-cost ultra-low-power processors
The student, Henry Duwe III, accepted the attached license on 2017-08-14 at 19:38.