Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
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Showing 1 to 10 of 10 for “"superscalar processor"”.
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Speculative Multithreading Architectures
Multiprocessor system evaluation has traditionally been based on direct-execution based Execution-Driven Simulations (EDS) where the processor component of the system is not fully modeled. However, using direct-execution to model a superscalar processor has been considered an open problem. In the …
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Enhancing instruction-level parallelism through compiler-controlled speculation
… programs (1) (2) (3). An effective VLIW or superscalar processor must optimize and schedule instructions across basic block boundaries to achieve higher performance. An effective structure for ILP compilation is the superblock (4). The formation and optimization of superblocks increase ILP …
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Processor parallelism considerations and memory latency reduction in shared memory multiprocessors
… compare the instruction-level parallelism of a superscalar processor and a pipelined processor with the loop-level parallelism of a shared memory multiprocessor. It is shown that the maximum speedup for a loop with a cyclic dependence graph is limited by its critical dependence ratio, …
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Development and evaluation of a simultaneous multithreading processor simulator
Modem processors are designed to achieve greater amounts of instruction level parallelism (ILP) and thread level parallelism (TLP). Simultaneous multithreading (SMT) is an architecture that exploits both LLP and TLP. It improves the utilization of the processor resources by allowing multiple …
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In-core, hint-based, speculative multithreading
State-of-the-art high-performance processors rely on instruction-level parallelism (ILP) during sequential regions. This results in excellent performance in regions that exhibit large amounts of ILP. However, gains are limited elsewhere, due to strict upper bounds, superlinear scaling of costs, and …
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Adding limited reconfigurability to superscalar processors
… design cost pushed for their replacement by Microprocessors. These processors, capable of implementing any functionality through a change in software, are thus often called General Purpose Processors. General purpose processors are used for everyday computing tasks, and found in all personal …
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Efficient spatial and temporal safety for microcontrollers and application-class processors
… and the first open application of CHERI to a superscalar processor. Tradeoffs in developing the architecture and performant microarchitecture are investigated. The processors are then used as a platform to conduct research in reducing the overheads for achieving temporal safety with CHERI. …
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Speculative Vectorization with Selective Replay
… vector instruction sets into general-purpose processors in the 1990s, and their successive improvement in subsequent architecture revisions. Single Instruction Multiple Data (SIMD) execution, where a single instruction operates on multiple data items, offers higher performance and lower energy …
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Flip Chip testing with a capacitive coupled probe chip.
… work also describes the design of a four issue superscalar microprocessor that was used as a reference for explorations of systems design for multichip modules (MCMs). This work focused on the chip testing aspect of area array I/O chips used in an MCM. Other work investigated partitioning, …