Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
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Showing 1 to 17 of 17 for “"run-time reconfigurable"”.
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Framework for a Context-Switching Run-Time Reconfigurable System
… machines has led to a wealth of research in run-time reconfigurable systems and applications. A limitation often encountered in this research is the slow configuration time with respect to the system clock speed. One technique to deal with these configuration delays has been to develop …
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A Multiplexed Memory Port for Run Time Reconfigurable Applications
… inefficient. The difficulties of implementing run time reconfiguration (RTR) on CCMs are addressed in this thesis. Tools and techniques are introduced to simplify the development and synthesis of applications and partitions for RTR applications. A multiplexed memory port (MMP) is presented in …
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Context Switching Strategies in a Run-Time Reconfigurable system
A distinctive feature of run-time reconfigurable systems is the ability to change the configuration of programmable resources during execution. This opens a number of possibilities such as virtualisation of computational resources, simplified routing and in certain applications lower power. …
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Architecture-Independent Design for Run-Time Reconfigurable Custom Computing Machines
… This technique is commonly referred to as run-time reconfiguration. Widespread acceptance of run-time reconfigurable custom computing depends upon the existence of high-level automated design tools. Given the wide variety of available platforms and the rate that the technology is evolving, …
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Dynamic Module Library Generation for FPGA-based Run-Time Reconfigurable Systems
… Gate Arrays (FPGAs) can implement entire run-time reconfigurable systems using partial reconfiguration. Module-based run-time reconfiguration permits the construction of custom applications at run-time using pre-compiled Intellectual Property (IP) from a module library. The need for both …
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VLSI Implementation of a Run-time Reconfigurable Custom Computing Integrated Circuit
… needs. With the increasing popularity of the run-time reconfigurable (RTR) concept in the CCM community, questions have arisen as to what computational device should be at the heart of an RTR platform. Currently the preferred device, and really the only practical device, has been the RAM-based …
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An FPGA-based Run-time Reconfigurable 2-D Discrete Wavelet Transform Core
FPGAs provide an ideal template for run-time reconfigurable (RTR) designs. Only recently have RTR enabling design tools that bypass the traditional synthesis and bitstream generation process for FPGAs become available. The JBits tool suite is an environment that provides support for RTR designs on …
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Image Wavelet Compression Implementation Using a Run-Time Reconfigurable Custom Computing Machine
… Programmable Gate Arrays (FPGAs) by using the run-time reconfigurable custom computing machine design tool Janus. The four routines implementing the IWC are discussed. The structure of Janus is introduced and the IWC implementation design framework to use Janus structure is described in detail. …
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Verification and Configuration of a Run-Time Reconfigurable Custom Computing Integrated Circuit for DSP Applications
… a data-flow approach to processing and is highly reconfigurable to suit the many computationally demanding tasks that new DSP applications present. A significant portion of the development of the Colt chip is architectural justification, functional verification, and configurability. This thesis …
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A Genetic Algorithm-Based Place-and-Route Compiler For A Run-time Reconfigurable Computing System
… experimental computing model known as wormhole run-time reconfiguration allows for partial reconfiguration and is highly scalable. In this approach, configuration information and data are grouped together in a computing unit called a stream, which can tunnel through the chip creating a series of …
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Accelerating Incremental Floorplanning of Partially Reconfigurable Designs to Improve FPGA Productivity
FPGA implementation tool turnaround time has unfortunately not kept pace with FPGA density advances. It is difficult to parallelize place-and-route algorithms without sacrificing determinism or quality of results. We approach the problem in a different way for development environments in which some …
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Structured Approach to Dynamic Computing Application Development
… the many low-level details that complicate Run-Time Reconfigurable (RTR) application development suffer severe limitations. This dissertation describes a comprehensive approach to dynamic hardware development, providing a designer with appropriate models for computation, communication, and …
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VLSI Implementation of a Run-time Configurable Computing Integrated Circuit - The Stallion Chip
Reconfigurable computing architectures are gaining popularity as a replacement for general-purpose architectures for many high performance embedded applications. These machines support parallel computation and direct the data from the producers of an intermediate result to the consumers over custom …
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A Stream-Based In-Line Allocatable Multiplier for Configurable Computing
… than conventional processors have, Wormhole run-time reconfigurable (RTR) techniques has been developed to address some high performance digital signal processing (DSP) problems. Multiplication is one of the basic functions used in digital signal processing. Most high-performance DSP systems …
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Design and Implementation of a Soft Radio Architecture for Reconfigurable Platforms
… attempt to gain flexibility through the use of reconfigurable hardware. The same piece of hardware can be configured to perform different functions based on the mode the radio is operating in. While many soft/software radio architectures have been suggested and implemented, there remains a lack …