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Showing 1 to 5 of 5 for “"power-efficient design"”.

  1. Power-efficient design of 16-bit mixed-operand multipliers

    … of the system as well as consuming large power. Consequently, significant improvements in both power and performance can be achieved in the overall DSP system by carefully designing and optimizing power and performance of the multiplier. This thesis explores several circuit-level …

    mit Repository record for Power-efficient design of 16-bit mixed-operand multipliers (opens in a new tab)

  2. Coherent Dynamic Nuclear Polarization: Mechanistic Insights and Experimental Advances

    … (CW) DNP has advanced through improved radical design, the development of pulsed DNP—employing short, high-power microwave bursts—has shown the advantages of coherent spin control. We present both theoretical and experimental investigations aimed at understanding and optimizing polarization …

    mit Repository record for Coherent Dynamic Nuclear Polarization: Mechanistic Insights and Experimental Advances (opens in a new tab)

  3. Overcoming nanoscale variations through statistical error compensation

    … nanoscale technologies create great obstacles in designing high-performance, next-generation digital integrated circuits (ICs). Conventional design principles impose increased design margins in power supply, device sizing, and operating frequency, leading to overly conservative designs which …

    uiuc Repository record for Overcoming nanoscale variations through statistical error compensation (opens in a new tab)

  4. Efficient VLSI Implementation of Arithmetic Units and Logic Circuits

    … components of any VLSI system. Thus realizing efficient arithmetic units and logic circuits is required for better performance of a data path unit and therefore microprocessor or digital signal processor (DSP). Adders are basic building blocks of any processor or data path application. For the …

    siu-theses Repository record for Efficient VLSI Implementation of Arithmetic Units and Logic Circuits (opens in a new tab)

  5. Nanoscale Nonvolatile Memory Circuit Design using Emerging Spin Transfer Torque Magnetic Random Access Memory

    … we present a modified STT MRAM cell design, where each cell is comprised of one magnetic tunneling junction (MTJ) device and a regular access transistor. We provide analysis of device, circuit and memory architecture level issues of STT-MRAM. The Modified 1M1T STT-MRAM bit cell …

    umkc Repository record for Nanoscale Nonvolatile Memory Circuit Design using Emerging Spin Transfer Torque Magnetic Random Access Memory (opens in a new tab)