Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
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Showing 1 to 20 of 40 for “"power-aware"”.
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Power-aware systems
In this thesis, we formalize the notion of power-aware systems and present a methodology to systematically enhance power-awareness. We define a power-aware system as one which scales its power consumption with changes in its operating scenario with a view to maximizing its energy efficiency. …
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Power aware embedded operating system design
Thesis (S.B. and M.Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2000.
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Power aware broadcast trees for sensor networks
… dimensional plane, the problem of constructing a power aware broadcast tree from a given source node is a difficult problem when nodes have k different levels of power. In fact, it is known that the problem of constructing a broadcast tree that minimizes total power consumption is NP-hard; We …
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POWER-AWARE PERFORMANCE OPTIMIZATION ON MULTICORE ARCHITECTURES
With growing computing demands, power aware computation has become a major concern in recent studies. We focus to scale the clock speed/operating frequency of mul- ticore processor to optimize the overall power consumption for a specific workload. Our work consists of four major parts. In the first …
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Power-aware routing in multi-hop wireless networks
… connectivity and cheaper network setup.<br/><br/>Power consumption is an important design criteria in WAHNs and WMNs,<br/>least because it directly impacts the cost of network operation and maintenance.<br/>To add to this, the information and communication technology (ICT) industry is already …
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Protocol stacks for power-aware wireless microsensor networks
… exploit these time-varying scenarios to obtain power savings by adjusting its operating conditions accordingly. A coherent design of application-specific network protocol stacks is the key. Specifically, embedding power aware features in the link layer and media access control (MAC) layer …
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Design of a Power-aware Dataflow Processor Architecture
… domains. Therefore, this thesis presents a power-aware dataflow processor architecture targeted for the electronic textile computing space. The processor architecture has no instructions, and handles multiple events inherently without deploying software methods. This thesis also shows that …
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An Application Framework for a Power-Aware Processor Architecture
… architecture design for reduction in the static power consumption is proposed. This thesis estimates significant reduction in overall power consumption with the incorporation of flash memory.
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A Power-Aware Routing Scheme for Ad Hoc Networks
… in ad hoc networks, are typically battery-powered. The growing need for energy efficiency in wireless networks, in general, and in mobile ad hoc networks (MANETs), in particular, calls for power enhancement features. The goal of this dissertation is to extend network lifetime by improving …
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Software Power Analysis And Optimization For Power-Aware Multicore Systems
… all the factors in sustainable computing, power dissipation and energy consumption, arguably speaking, are fundamental aspects of modern computer systems. Different from performance metric, power dissipation is not easy to measure because hardware instrumentation is usually required. Yet as …
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Power-Aware Planning and Design for Next Generation Wireless Networks
… should follow.</p> <p>This dissertation presents power-aware planning and design for next generation wireless networks. We study network planning and design problems in both offline planning and online resource allocation. We propose approximation algo- rithms and effective heuristics for various …
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Hardware and software for a power-aware wireless microsensor node
… attention paid to mechanisms for providing power awareness. The [mu]AMPS Revision 1 microsensor node is used as an example. The design of this node implementation is described in detail, including, in particular, the design of the pAMPS processor board and its power-scalable architecture. …
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Power-aware multisensor-management tracking on the Micro-AMPS platform
Thesis (M.Eng. and S.B.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2003.
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Efficient cross-silo federated learning using a computing power-aware scheduler
Submission original under an indefinite embargo labeled 'Open Access'. The submission was exported from vireo on 2024-09-16 without embargo terms
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Efficient cross-silo federated learning using a computing power-aware scheduler
Submission original under an indefinite embargo labeled 'Open Access'. The submission was exported from vireo on 2024-09-16 without embargo terms
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High Level Power Estimation and Reduction Techniques for Power Aware Hardware Design
… (RTL) to Electronic System Level (ESL). However, power envelope on the designs due to packaging and other thermal limitations, and the energy envelope due to battery life-time considerations have also created a need for power/energy efficient design. The confluence of these two technological …
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Mapreduce and heterogeneity: power-aware bag-of-tasks, framework parameter sensitivity, and dynamic cluster aware framework configuration
… frameworks to incorporate heterogeneity-aware scheduling algorithms, an inspection of cluster configurations and how they impact these scheduling algorithms, an analysis regarding how the cluster configuration and the heterogeneity-aware scheduling can work together to minimize turnaround …
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Power Saving Analysis and Experiments for Large Scale Global Optimization
… field of research that seeks to reduce excess power consumption in high performance computing (HPC), is gaining popularity among researchers. Research in this field often relies on simulation or only uses a small cluster, typically 8 or 16 nodes, because of the lack of hardware support. In …
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Energy and quality scalable wireless communication
… commercial microprocessor and integrated into a power aware, prototype microsensor node. Power aware abstractions encourage collaboration between the hardware, which fundamentally dissipates the energy, and software, which controls how the hardware behaves. Accurate models of hardware energy …
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Scheduling and Admission Control
Our third problem is power-aware scheduling, where the processor can run at different speeds, with its energy consumption depending on the speeds selected. If schedule quality is measured with makespan, we give linear-time algorithms to compute all non-dominated solutions for the general …
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