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Showing 1 to 7 of 7 for “"planar MOSFET"”.

  1. Characterization of Dopant Diffusion in Bulk and lower dimensional Silicon Structures

    … of the Metal Oxide Field effect transistor (MOSFET) approaches 16 nm, the scaling of the planar MOSFET is predicted to reach its limit. Consequently, a departure from the current planar MOSFET on bulk silicon substrate is required to push the scaling limit further while maintaining …

    vt Repository record for Characterization of Dopant Diffusion in Bulk and lower dimensional Silicon Structures (opens in a new tab)

  2. Third Quadrant Operation of 1.2-10 kV SiC Power MOSFETs

    … field-effect-transistors (MOSFETs), there are two current paths in the 3rd-quad conduction, namely the MOS channel path and the body diode path. It is well known that, for 1.2 kV silicon carbide (SiC) planar MOSFETs, the conduction loss in the 3rd-quad is reduced by turning …

    vt Repository record for Third Quadrant Operation of 1.2-10 kV SiC Power MOSFETs (opens in a new tab)

  3. Silicon on Ferroelectric Insulator Field Effect Transistor (SOFFET): A Radical Alternative to Overcome the Thermionic Limit

    The path of down-scaling traditional MOSFET is reaching its technological, economic and, most importantly, fundamental physical limits. Before the dead-end of the roadmap, it is imperative to conduct a broad research to find alternative materials and new architectures to the current technology for …

    umkc Repository record for Silicon on Ferroelectric Insulator Field Effect Transistor (SOFFET): A Radical Alternative to Overcome the Thermionic Limit (opens in a new tab)

  4. TCAD approaches to multidimensional simulation of advanced semiconductor devices

    … interest on alternatives to the conventional planar MOSFET architecture. TCAD simulation tools are fundamental to the analysis and development of new technology generations. However, the increasing device complexity is reflected in an augmented dimensionality of the problems to be solved. The …

    bologna Repository record for TCAD approaches to multidimensional simulation of advanced semiconductor devices (opens in a new tab)

  5. Projection of TaSiOx/In0.53Ga0.47As Tri-gate transistor performance for future Low-Power Electronic Applications

    … a change in architecture from the conventional planar MOSFET to be modified to a 3-D Tri-gate architecture which provides fully depleted characteristics by increasing the inversion layer area and hence, providing superior electrostatic control of the device channel to address short channel …

    vt Repository record for Projection of TaSiOx/In0.53Ga0.47As Tri-gate transistor performance for future Low-Power Electronic Applications (opens in a new tab)

  6. Gate-Oxide-Short Defect Analysis and Fault Modeling Based on FinFET's 3D Structure

    … of the most promising candidates in replacing planar MOSFET beyond the 22nm technology node due to further improvements in the transistor performance. However, the complexity of FinFET manufacturing process due to its three-dimensional structure and reduced critical dimensions have caused new …

    carleton Repository record for Gate-Oxide-Short Defect Analysis and Fault Modeling Based on FinFET's 3D Structure (opens in a new tab)

  7. Optimization for advanced lithography

    … show great advantages over traditional planar MOSFET transistors in high performance and low power applications. Edge device degradation is among the major challenges for the FinFET process. To avoid such degradation, dummy gates are needed on device edges, and the dummy gates have to be …

    uiuc Repository record for Optimization for advanced lithography (opens in a new tab)