Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
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Showing 1 to 7 of 7 for “"planar GaAs"”.
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Planar GaAs nanowire arrays for nanoelectronics: controlled growth, doping, characterization, and devices
… existing device processing which is intended for planar geometries. Nanowires are typically removed from the substrate, which requires painstaking and uneconomical methods to pattern and align the nanowires. Planar nanowires are a potential solution to this issue; they grow in-plane on the …
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Growth and application of planar III-V semiconductor nanowires grown with MOCVD
… and alignment on a wafer-scale. In this thesis, planar III-V nanowires are introduced as a low-defect and integratable nanotechnology building block grown with metalorganic chemical vapor deposition. Planar GaAs nanowires grown with gold seed particles self-align along the <110> direction on the …
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Planar nanowire high electron mobility transistor and down-scaling of planar nanowire
Monolithically grown planar nanowire (NW) high electron mobility transistors (NW-HEMTs) have been demonstrated with self-aligned <110> planar GaAs NW channels capped by a thin film AlGaAs barrier. The planar NW-HEMTs exhibit uniform and scalable DC characteristics; and resolve the electrical …
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Arrays of lateral p-n junction GaAs planar nanowire diodes grown by selective lateral epitaxy
… NWs are not compatible with conventional planar device processing. In this thesis research, arrays of lateral p-n junction planar GaAs NW diodes grown by selective lateral epitaxy (SLE) mechanism was developed to overcome the limitations of current lateral p-n junctions in thin films and …
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Array-based planar nanowire high electron mobility transistor
… NW electrical property, and compatibility with planar processing. In this thesis research, a bottom-up planar-NW high electron mobility transistor (HEMT) technology was developed to overcome the above challenges. Uniform and scalable electrical properties were demonstrated by prototype planar NW …
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Non-Silicon MOSFETs and Circuits with Atomic Layer Deposited Higher-k Dielectrics
… by ALD, ALE higher-k dielectric integration, GaAs nMOSFETs and pMOSFETs on (111)A substrates, and their related CMOS digital logic gate circuits as well as ring oscillators. A record high drain current of 376 mA/mm and a small SS of 74 mV/dec are obtained from planar GaAs nMOSFETs with 1μm …
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Three-dimensional field-effect transistors with top-down and bottom-up nanowire-array channels
… NW research centers on the Au-catalyzed planar GaAs NW assembly discovered at the University of Illinois Urbana-Champaign (UIUC). The top-down NW research approach involves plasma etching of an emerging wide-bandgap material, Gallium Oxide (Ga2O3), to make arrays of NW channels (or fins) …