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Showing 1 to 1 of 1 for “"mutliplier"”.
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Design of a High Speed Mixed Signal CMOS Mutliplying Circuit
<p>This thesis presents the design of a mixed-signal CMOS multiplier implemented with short-channel PMOS transistors. The multiplier presented here forms the product of a differential input voltage and a five-bit digital code. A TSMC 0.18 µm MOSFET model is used to simulate the circuit in Cadence …