Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
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Showing 1 to 20 of 211 for “"multicore"”.
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Multicore Scalability Through Asynchronous Work
… Moore's Law, computer architects have turned to multicore architecture to provide high performance. Unfortunately, to achieve higher performance, multicores require programs to be parallelized which is an untamed problem. Amdahl's law tells that the maximum theoretical speedup of a program is …
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Improving Multicore Resource Efficiency and Performance
<p>With clock speeds stagnating for the last few years and multi-cores having replaced uniprocessors, software development must now turn towards shared memory parallel programming to continue enhancing performance. Shared memory parallel programming; however is significantly more challenging than …
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Compiler Cost Model for Multicore Architectures
The intention to move from single core to multicore architectures has been to increase the performance of a system and hence increase the performance of an application. However, obtaining the optimal application performance on multicore architectures is found to be not that trivial and still …
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Flexible memory protection for multicore processors
A system’s memory access control mechanisms profoundly impact the performance, reliability, security, and composability of the software it runs. Desirable features of an access control mechanism include: the ability to grant arbitrary permissions on any region of memory to any thread in the system; …
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Hybrid coherence for scalable multicore architectures
Made available in DSpace on 2011-01-14T22:43:29Z (GMT). No. of bitstreams: 2 Kelm_John.pdf: 2626023 bytes, checksum: 069d102e87802f19ba796da9758e8be9 (MD5) license.txt: 4057 bytes, checksum: 83ce7b997e74195078c3d8fca669fdd2 (MD5)
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ScaleFS : a multicore-scalable file system
… and crash consistency in file systems along with multicore scalability. Commutative file system operations, which should scale according to the Scalable Commutativity Property, conflict on shared resources like coarse-grained locks and pages present in the page cache or buffer cache. Furthermore, …
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Exploiting Malleable Parallelism on Multicore Systems
As shared memory platforms continue to grow in core counts, the need for context-aware scheduling continues to grow. Context-aware scheduling takes into account characteristics of the system and application performance when making decisions. Traditionally applications run on a static thread count …
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POWER-AWARE PERFORMANCE OPTIMIZATION ON MULTICORE ARCHITECTURES
… a metric to determine core criticality. In multicore processing, certain threads/cores wait for other threads due to synchronization. Our proposed method combines Instructions Per Cycle (IPC) of a thread and the sum of IPCs of all co-running threads within a time quanta. We present a low …
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Adaptive CPU Resource Management for Multicore Platforms
… thesis is adaptive CPU resource management for multicore platforms. The work was done as a part of the resource manager component of the adaptive resource management framework implemented in the European ACTORS project. The framework dynamically allocates CPU resources for the applications. The …
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Breaking serialization in lock-free multicore synchronization
In multicores, performance-critical synchronization is increasingly performed in a lock-free manner using atomic instructions such as CAS or LL/SC. However, when many processors synchronize on the same variable, performance can still degrade significantly. Contending writes get serialized, creating …
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Fast transactions for multicore in-memory databases
Though modern multicore machines have sufficient RAM and processors to manage very large in-memory databases, it is not clear what the best strategy for dividing work among cores is. Should each core handle a data partition, avoiding the overhead of concurrency control for most transactions (at the …
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Scheduling and synchronization for multicore concurrency platforms
… vendors have been shifting towards building multicore computers. This trend creates an enormous pressure to create concurrency platforms - platforms that provide an easier interface for parallel programming and enable ordinary programmers to write scalable, portable and efficient parallel …
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Adaptive mechanisms for self-aware multicore systems
… eventually affect the ultimate performance of multicore processors, and so programmers are forced to optimize systems for both performance and energy in the midst of countless configurable parameters - an extremely difficult task. Self-aware systems can configure themselves through …
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Shared Memory Abstractions for Heterogeneous Multicore Processors
… are therefore experimenting with a variety of multicore processor designs. Heterogeneous multicore processors with Explicitly Managed Memory (EMM) hierarchies are one such experimental design which has the potential for high performance, but at the cost of great programmer effort. EMM …
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Elliptic Curve Cryptography on Heterogeneous Multicore Platform
Elliptic curve cryptography (ECC) is becoming the algorithm of choice for digital signature generation and authentication in embedded context. However, performance of ECC and the underlying modular arithmetic on embedded processors remains a concern. At the same time, more complex system-on-chip …
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Software and architecture support for the bulk multicore
Research on transactional memory began as a tool to improve the experience of programmers working on parallel code. Just as transactions in databases, it was the job of the runtime to detect any conflicts between parallel transactions and rollback the ones that needed to be re-executed, leaving the …
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Tunable WCET for hard real-time multicore system
In recent years, multicore processors have been receiving a significant amount of attention from avionic and automotive industries as the demand for high-end real-time applications drastically increases. However, the unpredictable worst-case timing behavior that mainly arises from shared resource …
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HAsim : cycle-accurate multicore performance models on FPGAs
… cycle-accurate performance modeling of multicore processors using FPGAs. Contributions include a distributed technique controlling simulation on a highly-parallel substrate, hardware design techniques to reduce development effort, and a specific framework for modeling shared-memory …
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Locality-aware cache hierarchy management for multicore processors
Next generation multicore processors and applications will operate on massive data with significant sharing. A major challenge in their implementation is the storage requirement for tracking the sharers of data. The bit overhead for such storage scales quadratically with the number of cores in …
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