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Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
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Showing 1 to 20 of 26 for “"multi-core systems"”.
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Heterogeneous prioritization for network-on-chip based multi-core systems
In chip multi-processor (CMP) systems, communication and memory access both play an important role in influencing the performance achievable by the system. The manner in which the network packets (on-chip cache requests/responses) and off-chip memory bound packets are handled, in multi-core …
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Low-cost Methods for Error Detection in Multi-core Systems
… to processor micro-architectures and memory systems. Many of the techniques used today were developed in a time when fault coverage was the primary optimization target; hardware, power, and performance costs were only secondary concerns. These priorities do not accurately reflect the needs of …
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Efficient Virtual Cache Coherency for Multi-core Systems and Accelerators
There is a paradigm shift from general-purpose cores to specialised hardware, which has vastly different programming models. It will be helpful if the existing programming model can be kept and new hardware can co-exist and cooperate with existing userspace software. A virtual cache coherence …
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Autonomic behavioural framework for structural parallelism over heterogeneous multi-core systems.
… exploit the latest developments in heterogeneous multi-core/many-core architectures. Structural programming paradigms propose a viable solution for e ciently programming modern heterogeneous multi-core architectures equipped with one or more programmable Graphics Processing Units (GPUs). Applying …
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EFFICIENT AGEING-AWARE TECHNIQUES FOR EMERGING LOW POWER MULTI-CORE SYSTEMS
… this in two ways. Firstly, we consider a many-core system where applications arrive randomly with different behavioural patterns and use the Mean Time To Failure (MTTF) of the nodes to improve the lifetime. Secondly, we use dark nodes to alleviate the temperature and to improve the lifetime. …
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Predictable inter-core communication for strictly partitioned real-time multi-core systems
… guidance suggests that more than one core in a multi-core chip for safety-critical avionics applications can be used only if all the inter-core interference channels have been bounded and accounted for. Researchers have proposed frameworks to partition and regulate access to shared …
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Development and evaluation of graphical user interface and benchmark creation for cache management on multi-core systems
DSpace SAF Submission Ingestion Package generated from Vireo submission #11472 on 2017-09-29 at 11:19:27
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ARCHITECTURE-AWARE HARD-REAL-TIME SCHEDULING ON MULTI-CORE ARCHITECTURES
… have led to increase computational load on systems. The increasing computational load can be handled to some extent by scaling up processor frequencies. However, this approach has hit a frequency and power wall and the increasing awareness towards green computing discourages this solution. …
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An Investigation of I/O Strategies for MPI Workloads
… improving application performance in parallel systems. Studies have been shown that I/O communication delay is the main reason for different behavior of I/O intensive applications with specific requirements for performance optimization. So, using common strategies, generally defined and …
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High Performance Architecture using Speculative Threads and Dynamic Memory Management Hardware
… to explore scalable architectures leading to multi-core systems with several hundreds of processing elements. In this dissertation, I address how the performance of modern processing systems can be improved, while attempting to reduce hardware complexity and energy consumptions. My research …
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Boosting static timing analysis with programming and algorithmic approaches
… model and algorithm to boost timing analysis. As multi-core systems have become common in modern electronics, how to fit timing analysis into the multithreading environment is a trending research topic. We explore this direction with a new task-based multithreading framework and demonstrate its …
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An optical data receiver for integrated photonic interconnects
… are being pushed to their limits. In past single-core processors, the number of long global wires constituted only a small fraction of the total. However, with the emergence of multi-core systems, where each core must be able to communicate with each other as well as off-chip memory, global …
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f-DSM: An FPGA-Accelerated Distributed Shared Memory for Heterogeneous Instruction-Set-Architecture Hardware
… relevance of Moore's Law, traditional multi-core systems are increasingly struggling to meet the computational demands of many emerging workloads. Heterogeneous computing, which involves exploiting higher degrees of parallelism (e.g., GPUs) and application-specific specialization (e.g., …
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Prediction Models for Multi-dimensional Power-Performance Optimization on Many Cores
Power has become a primary concern for HPC systems. Dynamic voltage and frequency scaling (DVFS) and dynamic concurrency throttling (DCT) are two software tools (or knobs) for reducing the dynamic power consumption of HPC systems. To date, few works have considered the synergistic integration of …
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Parallel network protocol stacks using replication
… demand good performance from networking systems. This includes high-bandwidth communication using protocols with sophisticated features such as ordering, reliability, and congestion control. Much of this protocol processing occurs in software, both on desktop systems and servers. …
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Improving programmability and performance for scientific applications
… solver using a novel coupling technique for multi-time scale methods for discrete finite element domains. We exploit domain semantics using a high-level dynamic runtime scheme to reorder and balance workloads to greatly improve runtime performance. The framework presented automatically …
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Reducing memory persistency overheads with transparent out-of-place updates
… new challenges since applications running on NVM systems require data persistence guarantees with respect to system crashes. To address this problem, many crash-consistency techniques, including logging and shadow paging, have been proposed. However, existing solutions can suffer from significant …
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Predictive power management for multi-core processors
Energy consumption by computing systems is rapidly increasing due to the growth of data centers and pervasive computing. In 2006 data center energy usage in the United States reached 61 billion kilowatt-hours (KWh) at an annual cost of 4.5 billion USD [Pl08]. It is projected to reach 100 billion …
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Fairness and Approximation in Multi-version Transactional Memory.
Shared memory multi-core systems bene_x000C_t from transactional memory implementations due to the inherent avoidance of deadlocks and progress guarantees. In this research, we examine how the system performance is a_x000B_ected by transaction fairness in scheduling and by the precision in …
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In-Memory Computing Architecture for Deep Learning Acceleration
… the memory and computing requirement, multi-core systems that make intensive use of accelerators become the future of computing. Such novel computing systems incurs new challenges including architectural support for model training in the accelerators, large cache demands for multi-core …
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