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Showing 1 to 8 of 8 for “"memory address"”.
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Identifying Memory Address Disclosures
… defenders. Leaking of the contents of computer memory has always been considered a vulnerability, but until recently it has not typically been considered a serious one. As this can be used to bypass key mitigation techniques, these vulnerabilities are now considered critical to preventing whole …
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VLSI Physical Design for Manufacturability and Reliability
… is present to reduce the power consumption in memory address bus for specific applications. The energy dissipates to both coupling and self capacitances are considered during the optimization. A statistical shortest path algorithm is present in Chapter 4. Its applications, such as maze routing, …
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Design for Security: Measurement, Analysis and Mitigation Techniques
… the user to arbitrarily specify the target memory address to read, write or transfer control to, which is usually a pathological program behavior due to memory corruption attacks. Based on the notion of pointer taintedness, we developed a theorem proving technique to identify potential …
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Numerical simulations on heterogeneous systems: dynamic workload and power management
… performance imbalances and disjoint memory address spaces. These challenges not only widen the gap between peak and sustained performance, but also significantly reduce development productivity. Additionally, numerical applications often exhibit dynamic workloads, with unpredictable …
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Improved Designs for Application Virtualization
… model as a look-up table: LUT). Similar to the memory hierarchy which is widely used in the computing field, we separate the single LUT into two-level, hierarchical LUTs. To separate the entries without sorting all entries, we propose an entropy-based fast LUT separation algorithm which utilizes …
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High Angular Resolution Beam Steering Terahertz Antenna Arrays for Imaging Applications
… phase control. The approaches taken in this work address these issues, enabling a 98x98 antenna array at 265GHz which employs passive one bit phase shifters based on two MOSFET switches. These phase shifters are low-loss, low-area and consume no DC power. A reflector array (reflectarray) …
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Taming implicit synchronizations in concurrent programs
… data race detectors by detecting address transfer, a major cause of false positives in data race detections. Most data race detectors require the accurate knowledge of synchronizations in the programs and cannot recognize implicit synchronizations , thus suffer from false positives …
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A software approach to accelerating memory translation for virtualized clouds
Submission original under an indefinite embargo labeled 'Open Access'. The submission was exported from vireo on 2024-09-16 without embargo terms