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Showing 1 to 4 of 4 for “"level shifter"”.
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An on-chip three-level boost converter for energy harvesting application
The first on-chip three-level boost converter with 0.28 mm2 die size is implemented using 65 nm CMOS technology. Leveraging the advantages of hybrid switched capacitor converters, the converter manages to provide a maximum output voltage of 4.5 V with the available 2.5 V devices in this technology. …
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Design of low-power digital circuits in the sub-threshold domain
… for subthreshold operation, 2) couple of level shifter circuits capable of sub-threshold to above threshold voltage conversion and 3) a subthreshold memory array. We have used the 28nm FD-SOI technology from ST Microelectronics. The standard cell library contains basic design cell units, …
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Battery Cell Monitoring Unit
… a single op-amp differential amplifier and level shifter, and a high-precision composite amplifier. The proposed circuit is implemented on a printed circuit board. Measurement results show that the highest power dissipation under continuous operation is from the current sensing circuit at …
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A Reliable CMOS Receiver for Power Line Communications in Integrated Circuits
… three main sub-blocks. The first sub-block is a level shifter, which lowers the offset voltage of the supply voltage to approximately 0.5VDD. The second sub-block is a signal extractor, which detects a data signal superimposed on the power line. The signal extractor is a differential amplifier, …