Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
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Showing 1 to 14 of 14 for “"latch-up"”.
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Investigation of system-level ESD-induced failures
… be caused by noise entering signal pins or by supply voltage fluctuations. Soft failures have previously been studied by using test structures to identify failure mechanisms or actual products to identify the types of soft failures that occur. These models are either simplified or offer little …
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Modeling and numerical methods for power electronic devices
A scalable I-V model for latch-up in non-collinear PNPN devices is adapted from a previous model for collinear SCR devices. The model is applied to 14-nm FinFET test structures. Layout scaling trends for key latch-up metrics, such as holding and trigger voltage, are captured by the model in circuit …
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Reduction of Switching Losses in IGBT Power Modules
… della tensione possono produrre fenomeni di 'latch-up' in ogni singolo IGBT o commutazioni indesiderate. D'altra parte, commutazioni lente sono caratterizzate da bassi valori di dv/dt e di/dt , causando perdite eccessive specialmente nelle applicazioni di potenza. Pertanto, per affrontare il …
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Radiation-Hardened Delay-Insensitive Asynchronous Circuits for Multi-Bit SEU Mitigation and Data-Retaining SEL Protection
… logic architectures to mitigate the effects of up to two single-event upsets (SEU) and a single-event latch-up (SEL). The multi-bit SEU mitigation with SEL protection architecture improves the original design by providing more integrity against data corruption and lock-ups caused by multi-bit …
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Silicon Germanium SRAM and ROM Designs for Wide Temperature Range Space Applications
… against total ionizing dose (TID), single-event upset (SEU), and single-event latch-up (SEL). The memory arrays are also designed to operate over the wide temperature range of -180 °C to 125 °C. Design, simulation, and physical layout are evaluated throughout the process. Modeling of the memory …
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Characterization of commercial step-down converter performance in the low Earth orbit radiation environment
… high instrument performance. This shift opens up the Commercial Off The Shelf (COTS) electronics market to space applications. To quantify the risks associated with using COTS parts, components must be tested in flight-like configurations and conditions and their response to environmental …
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Novel Lateral MOS Controlled Power Devices and Technologies for Power Integrated Circuits
… voltage, fast switching speed, small area of occupation. However, conventional lateral MOS power devices, especially the devices with the operation of the conductivity modulation mode, have to be improved further to meet these requirements. Isolation technology, as an essential technology in …
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Failures caused by supply fluctuations during system-level ESD
… this current is similar in various ESD test setups. Circuit models with distributed elements enable accurate modeling of the system-level ESD current in contact discharge. Experiments have shown that ESD-induced noise on signal traces starts to disturb the IO input at very low ESD levels, and …
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Exploiting the bulk-driven approach in CMOS analogue amplifier design
… analogue amplifier design under the very low-supply voltage constraints. In this thesis, three application areas of the bulk-driven approach are focused – at the input-stage of differential pairs, at the source followers, and at the cascode devices. For the input stage of differential pairs, …
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Understanding, modeling, and mitigating system-level ESD in integrated circuits
… modeling pieces of a system-level ESD test setup and phenomenological studies. Simulation is an important tool for achieving quality designs quickly. However, modeling methodologies for system-level ESD are not yet mature. This dissertation aims to improve (i) simulation models of ESD …
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LATERAL POWER DEVICES AND TECHNOLOGIES FOR HIGH VOLTAGE INTEGRATED CIRCUITS
… advancements in breakdown voltages and latch up current densities without compromising forward voltage drop and turn-off losses, furthermore, it is found that a VLD drift region can achieve the required breakdown voltage with smaller drift region lengths in comparison to uniform drift …
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Novel Power Semiconductor Devices and Technologies
… power semiconductor devices. It will focus upon the development of 1200V and 1700V fast recovery diodes and two MOS gated thyristor structures viz. the Accumulation Layer enhanced Emitter Switched Thyristor (ALEST) and the Clustered IGBT (CIGBT). Furthermore the insight into the principles …
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Design of Novel Devices and Circuits for Electrostatic Discharge Protection Applications in Advanced Semiconductor Technologies
… handling, surge and spike signals in the power supply, and wrong supplying signals, will probably cause severe damage to the ICs and even the whole systems. Generally, ESD protections are evaluated after wafer and even system fabrication, increasing the development period and cost if the …
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Design, Characterization and Analysis of Component Level Electrostatic Discharge (ESD) Protection Solutions
… some cannot. And this investigation also brings up a potential threat to the current ESD protection devices that they might be very vulnerable to the latch-up issue at the higher temperature range.