Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
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Showing 1 to 16 of 16 for “"high speed link"”.
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Latency insertion method for fast high-speed link and IC simulation
Submission published under a 24 month embargo labeled 'U of I Access', the embargo will last until 2025-08-01
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Machine learning surrogate modeling methods in inverse high-speed link design
Submission published under a 24 month embargo labeled 'U of I Access', the embargo will last until 2024-12-01
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Eye diagram modeling and statistical simulation in nonlinear high-speed link systems
Submission original under an indefinite embargo labeled 'Open Access'. The submission was exported from vireo on 2024-09-16 without embargo terms
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Machine learning approach for high speed link modeling and IBIS-AMI model generation
The high-speed link system is one of the major components in the networking infrastructure. Developing a high-performance behavioral model for such a system is crucial but challenging, especially when taking nonlinearity into account. This work reports modeling the high-speed link (HSL) system …
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Machine learning approach for cascade-able nonlinear transceiver modeling and high speed link simulation
Submission published under a 24 month embargo labeled 'U of I Access', the embargo will last until 2024-12-01
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Transistor level X-parameter simulations of equalization circuits
… circuit designers must deal with. Specifically, high-speed links have been the focus of much of the research into mitigating signal integrity issues. To combat the effects of jitter and other signal integrity problems, circuit designers have begun using increasingly more complex circuitry …
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Energy-Efficient Switching By Band Modulation And Passive Equalization
… digital systems will be the bottleneck of future high performance and mobile computing. For the past four decades, the wireline communication bandwidth, the number of packaging pins, and transistor density have grown exponentially. Meanwhile, the power consumption has also grown at the same rate …
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Characterization of channel simulation method with Jitter and equalization effect on eye diagram
This thesis discusses the performance of transient brute force channel simulation and edge-based bit-by-bit simulation of a signal propagating through a channel. The efficient and accurate eye diagram generated from bit-by-bit mode simulation is presented. The eye diagram representation involving …
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Models predicting the performance of IC component or PCB channel during electromagnetic interference
… both in simulations and in measurements of a high-speed link.</p> <p>In the second paper, methods are developed to predict the statistical distribution of timing jitter due to dynamic currents drawn by an integrated circuit (IC) and the resulting power supply noise on the PCB. Distribution of …
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Packet switching in wide area broadband private networks
… in the broadband environment due to the high speed link, the wide area distance, diverse service requirements and diverse traffic characteristics. Most congestion and flow control approaches in conventional packet switched networks are reactive in nature and are not applicable in the …
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Channel coding for high speed links
… explores the benefit of channel coding for high-speed backplane or chip-to-chip interconnects, referred to as the high-speed links. Although both power-constrained and bandwidth-limited, the high-speed links need to support data rates in the Gbps range at low error probabilities. Modeling …
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Design and analysis of a 1.28ghz charge pump phase-locked loop in 180nm technology node
Submission original under an indefinite embargo labeled 'Open Access'. The submission was exported from vireo on 2024-09-16 without embargo terms
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Using x-parameters for signal integrity applications
… buffers are the nonlinear terminations of the high-speed links that the signal integrity engineer is tasked with designing and optimizing. Brief treatments of the X-parameter formalism, the harmonic balance simulation method, the latency insertion method, and the Input/Output Buffer Information …
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System-Aware Design of Energy-Efficient High-Speed I/O Links
Today's high-speed I/O links operate under stringent specifications: few tens of Gb/s data rates over 20 inches of copper trace, power efficiencies of the order of 10-to-30 mW/Gb/s and a bit error-rate (BER) target of 10^(-12) or lower. State-of-the-art I/O links consist of a transmit driver, PLL, …
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Novel smart modules for imaging, communications, and displays
… adapt to the number of users and to changes in link length, and a smart laser projection display that smartly adjust the pixel size to achieve a high resolution projected image at each screen distance. The first part of the dissertation starts with the proposal of using an ECVFL to create a …
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Machine learning based models for signal integrity analysis
Made available in DSpace on 2022-01-12T22:35:16Z (GMT). No. of bitstreams: 3 NGUYEN-DISSERTATION-2021.pdf: 24692877 bytes, checksum: 26f8ad8bdafbb48958bc3f2682a3dd51 (MD5) LICENSE.txt: 4209 bytes, checksum: 548a765547e3e0ab8829c91d9ea90bc4 (MD5) PROQUEST_LICENSE.txt: 4555 bytes, checksum: …