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Showing 1 to 20 of 1885 for “"gate"”.

  1. The Rusted Gate

    <p>Hannah Bloch’s dreams have always been larger than life. Though she’s lived in the same L—ville workhouse for as long as she can remember, she still hopes for a chance to see the beautiful world beyond. When a personal tragedy sends her into the countryside, she takes a post as a maid for the …

    nmu Repository record for The Rusted Gate (opens in a new tab)

  2. Randomized Benchmarking Simulations of Quantum Gate Sequences with Z-gate Virtualization

    … algorithms relies on high fidelity quantum gate operations. Single and two-qubit gate errors lead to reductions in the average fidelity of quantum gate sequences. Using the Z-gate virtualization procedure, the average sequence fidelity of single-qubit gate sequences can be increased. In …

    mit Repository record for Randomized Benchmarking Simulations of Quantum Gate Sequences with Z-gate Virtualization (opens in a new tab)

  3. Green engineering and gate-to gate life cycle assessments for pharmaceutical products

    … applications. This analysis concerned a gate-to-gate analysis of two distinct pharmaceutical products along with the development of a solvent selection table. The goal of this research was to determine how various processing and environmental metrics were affected by process …

    rowan Repository record for Green engineering and gate-to gate life cycle assessments for pharmaceutical products (opens in a new tab)

  4. Electrical characterization of high-k gate dielectrics for advanced CMOS gate stacks

    … quality of metal oxide semiconductor (MOS) gate stack structures are critical to future CMOS technology. As SiO_2 was replaced by the high-k dielectric to further equivalent oxide thickness (EOT), high mobility substrates like Ge have attracted increasing in replacing Si substrate to further …

    njit Repository record for Electrical characterization of high-k gate dielectrics for advanced CMOS gate stacks (opens in a new tab)

  5. Gate-geometry Dependence of Enhancement-mode p-GaN Gate High Electron Mobility Transistors

    … power electronics is the enhancement-mode p-GaN Gate High Electron Mobility Transistor (HEMT) which matches the power, voltage, and efficiency of conventional GaN FETs but most importantly features a positive threshold voltage. This is achieved by the insertion of a Mg-doped GaN layer above the …

    mit Repository record for Gate-geometry Dependence of Enhancement-mode p-GaN Gate High Electron Mobility Transistors (opens in a new tab)

  6. Currents through the Golden Gate

    … (CTD) instrument were deployed in the Golden Gate. Tidal constituents were derived from least squares fit on pressure and current data. The amplitude of the M2 tide was 0.6 m and 100 cm/s, and primary tidal constituents were about 0.3 m and 20 cm/s. Current profiles were largely barotropic and …

    nps Repository record for Currents through the Golden Gate (opens in a new tab)

  7. Suspended Gate Silicon Nanodot Memory

    … satellites. However,the conventional floating gate memory technology in use for flash memory is facing a serious scalability issue, the tunnel oxide thickness cannot be reduced to less than 7nm as pointed out in the latest international technology roadmap for semiconductors (ITRS2010) [1]. The …

    soton Repository record for Suspended Gate Silicon Nanodot Memory (opens in a new tab)

  8. The gate with critical analysis

    The Gate explores conscience and the effect of the reawakening of a long buried guilt. The play focuses on David Rivers, a military research scientist who has developed a method for removing traumatic memories from individuals suffering from combat stress. Sam Evans, a mistreated former research …

    birmingham Repository record for The gate with critical analysis (opens in a new tab)

  9. Organic molecular floating gate memories

    … utilize charge storage in polysilicon floating gates imbedded in insulating silicon oxide films'. As demands for high storage density, high chip memory capacity, and decreasing process costs continue to mount, conventional flash memory has found it challenging to continue scaling and it may …

    mit Repository record for Organic molecular floating gate memories (opens in a new tab)

  10. Concurrent gate-level circuit simulation

    … has transformed from a niche discipline relegated primarily to scientific computing into a standard component of highperformance personal computers. At the same time, simulating processors prior to manufacture has become increasingly time-consuming due to the increasing number of gates on a …

    mit Repository record for Concurrent gate-level circuit simulation (opens in a new tab)

  11. Gate design for injection molds

    … stages, which are the critical stages for gate design purposes.

    vt Repository record for Gate design for injection molds (opens in a new tab)

  12. EFFECTS OF GATE THICKNESS, GATE MORPHOLOGY, AND EMISSIVE MATERIAL ON ORGANIC LIGHT EMITTING VARACTOR CAPACITOR PERFORMANCE

    … are built similarly to OLEDs, with an added gate. Under AC driving, this gate allows control of current flow to yield a higher maximum efficiency than the OLED. Numerous factors must be studied before such efficiencies can be approached.

    wfu Repository record for EFFECTS OF GATE THICKNESS, GATE MORPHOLOGY, AND EMISSIVE MATERIAL ON ORGANIC LIGHT EMITTING VARACTOR CAPACITOR PERFORMANCE (opens in a new tab)

  13. A comparison of electrical performance analysis between nanoscale double-gate and gate-all-around nanowire mosfet

    The Double-Gate and Gate-all-Around are said to be the promising candidates to pursue Complementary-Metal-Oxide Semiconductor scaling. When the device is scaled down, several problems arise such as the short-channel effect, excessive transistor gate leakage and power consumption. The purpose of …

    uthm Repository record for A comparison of electrical performance analysis between nanoscale double-gate and gate-all-around nanowire mosfet (opens in a new tab)

  14. Layout Synthesis of Nmos Gate-Cells

    The NMOS Gate-Cell, a regular structure that supports gate level implementations of random logic is introduced. It is an extension of the Weinberger array, where allowing input/output terminals on all four edges resulted in an improved interconnect flexibility. Intercell routing is allowed to …

    uiuc Repository record for Layout Synthesis of Nmos Gate-Cells (opens in a new tab)

  15. The Lockport Sluice Gate Model Study

    Submitted by Melinda Miller (mkmiller@illinois.edu) on 2011-08-08T21:27:26Z No. of bitstreams: 1 muga.pdf: 33598467 bytes, checksum: d408051b1bd475af847354518b9e14ad (MD5)

    uiuc Repository record for The Lockport Sluice Gate Model Study (opens in a new tab)

  16. Sluice gate discharge of stratified flow

    Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Civil and Sanitary Engineering, 1954.

    mit Repository record for Sluice gate discharge of stratified flow (opens in a new tab)

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