Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
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Showing 1 to 20 of 36 for “"electrostatic discharge (ESD)"”.
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Design, Characterization and Analysis of Component Level Electrostatic Discharge (ESD) Protection Solutions
Electrostatic Discharges (ESD) is a significant hazard to electronic components and systems. Based on a specific process technology, a given circuit application requires a customized ESD consideration that meets all the requirements such as the core circuit's operating condition, maximum accepted …
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System and IC level analysis of electrostatic discharge (ESD) and electrical fast transient (EFT) immunity and associated coupling mechanisms
… exposure of electronic circuits to lightning, electrostatic discharge (ESD), electrical fast transients (EFT) or sine wave signals can reveal RF immunity problems. Typical problems include temporary malfunctions or permanent damage of integrated circuits (ICs). In an effort to reproduce those …
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Modeling and simulation of electrical overstress failures in input/output protection devices of integrated circuits
… of integrated circuits with respect to EOS/electrostatic discharge (ESD) can be measured in terms of the power vs. time-to-failure relationship (power profile) and the current vs. time-to-failure relationship (current profile).
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Evaluation of the practicality of system efficient ESD design
… the integrated circuit (IC) to an IEC 61000-4-2 discharge. Electrostatic discharge (ESD) gun zaps are applied to the test board; simulated and measured waveforms are compared.
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Automated testing and machine-learning-based modeling of air discharge ESD
An IEC 16000-4-2 compliant, high-accuracy air-discharge automation system is used to study the properties of air discharge electrostatic discharge (ESD). This work corroborates conclusions of previous works and presents new insights into the effects of approach speed on ESD. A methodology for …
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Modeling simulation and design guidelines for EOS/ESD protection circuits in CMOS technologies
Electrical Overstress (EOS) and Electrostatic Discharge (ESD) are major causes for integrated circuit (IC) field failures. Industry surveys indicate that nearly 50% of all IC field failures can be attributed to EOS/ESD events. The susceptibility to EOS/ESD increases as the minimum feature size in …
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Uncalibrated TCAD methodology for analysis of ESD protection devices
… uncalibrated TCAD methodology for simulation of electrostatic discharge (ESD) devices is presented. The methodology addresses TCAD setup issues including device construction, boundary conditions, and choosing a physical model and parameters. A major trade-off between computation complexity and …
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The effect of on-chip ESD protection on reliable high-speed I/O link equalization power consumption
… the magnitude of the parasitics generated by electrostatic discharge (ESD) protection devices has become budgeted. Such budgets restrict the protection level and implementation options of the ESD protection circuit designer. In this work, the ESD protection on high-speed serial I/O link …
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High-voltage ESD PNP clamp simulation and design
In this work high-voltage Electrostatic discharge (ESD) PNPs are studied through TCAD simulation and device measurement. PNPs for three different voltage classes, 16 V, 65 V, and 100 V, in a 0.5-µm Bipolar CMOS DMOS (BCD) technology are used as the context for the study. The PNPs are varied in …
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Identification and visualization of electromagnetic coupling paths & nonlinear capacitors for ESD protection
… and suggests improved trade-off between electrostatic discharge (ESD) protection and data bandwidth by using the antiferroelectric (AFE) capacitors as ESD protection. The dielectric constant of AFE material increases with increasing voltage. The voltage dependence of X7R and AFE …
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Logic upset induced by substrate current during power-on ESD
… possible soft failure mechanism during power-on electrostatic discharge (ESD). For contact discharge into a test chip mounted on a board, logic upsets can be triggered by a parasitic NPN structure which couples the ESD protection to an N+ diffusion in the core circuitry. This type of upset often …
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Enhanced modeling methodology for system-level electrostatic discharge simulation
To enable accurate system-level electrostatic discharge (ESD) simulation, models for the equipment under test, the ESD source, and the environment are required. This work presents advanced modeling methods for the ESD source, the victim IC, and other on-board components, most notably the transient …
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Full chip modeling for predictive simulation of charged device model electrostatic discharge events
… (ICs), the risk of circuit failure due to electrostatic discharge (ESD) is increasing. In particular, the increased usage of automated handlers is causing charged device model (CDM) ESD induced failures to become more prominent. Gate oxide failure is the primary signature of CDM ESD. During …
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Modeling, Characterization, and Design of Silicon Controlled Rectifiers for Electrostatic Discharge Protection Circuits
… of silicon controlled rectifiers (SCRs) for electrostatic discharge (ESD) protection applications. The oscillatory transmission line pulse (oTLP) measurement is introduced in this work. oTLP measurements enable indirect observation of a device's charge storage duration. When applied to SCRs, …
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Modeling and simulation of full-component integrated circuits in transient ESD events
… a methodology to model and simulate transient electrostatic discharge (ESD) responses of integrated circuits (IC). To obtain valid simulation results, the IC component must be represented by a circuit netlist composed of device models that are valid under the ESD conditions. Models of the …
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Modeling and Analysis Methods for ESD and EMI Problems
<p>"Electrostatic discharge (ESD) failures and Electromagnetic interference (EMI) problems are becoming more critical in electronic devices and large systems. In this work, four studies are presented to model and analyze ESD and EMI problems.</p> <p>First, a simplified physical-based model for …
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Investigation of system-level ESD-induced failures
Electrostatic discharge (ESD) is a phenomenon that can adversely impact the operation of systems. ESD is a short duration, high current stress which can cause the permanent failure of a system or temporary glitches in a system. Soft failures include any recoverable system malfunction, from resets …
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Radio frequency interference (RFI) modeling of complex modules in mobile devices and system-level modeling for transient ESD simulation
… (RFI) and electro-static-discharge (ESD) problems happened in mobile devices.</p> <p>In the first paper, an averaging technique is developed, for phase resolved scanning over random fields generated by multiple uncorrelated stochastic sources. This method can separate the …
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Applications of Machine Learning in the Design and Optimization of Analog Integrated Circuits and Systems
… thesis. In the first practice, a T-coil-enhanced electrostatic discharge (ESD) circuit optimization scheme is presented, where a novel up-sampling convolutional neural network (CNN) is proposed to quickly predict the S-parameter of a T-coil from DC to 100 GHz from its layout geometric parameters, …
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Explosive Safety with Regards to Electrostatic Discharge
… shock due to static charge, or properly called, Electrostatic Discharge (ESD) is a phenomenon that has significantly damaging effects. Most people who stay informed of the current news, have heard stories of static charge causing a pump at a gas station to start on fire. Some individuals may even …
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