Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
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Showing 1 to 20 of 28 for “"digital to analog converter (DAC)"”.
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Linearity and monotonicity of a 10-bit, 125 MHz, segmented current steering digital to analog converter
The purpose of this research is to determine the linearity and monotonicity of the THS5651IDW digital to analog converter (DAC), a prototype of the future Texas Instruments TLV5651, 10-bit, 125 MHz communication DAC. Testing was conducted at the Texas Instruments facility on Forest Lane, Dallas, …
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Tutorial on designing and implementing a direct digital synthesizer (DDS) on a field programmable gate array (FPGA)
… One such a frequency synthesizer is a direct digital synthesizer (DDS). This thesis work utilizes a design that aims to combine digital circuit design and electronic communication knowledge, and apply them in a practical environment. It does so by providing a tutorial on designing and …
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Construction of a random signal with a specific Psd and a uniform Pdf
… of a dynamic element matching (DEM) flash digital to analog converter (DAC) can be improved by controlling the DEM DAC's interconnection network with a random signal that has a specific power spectral density (PSD) and a uniform probability distribution function (PDF). Many algorithms exist …
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An optical-electrical sub-sampling down-conversion receiver with continuous-time [Sigma] [Delta] modulation
… continuous-time (CT) [Sigma] [Delta] analog- to-digital converter (ADC). Here, photodiodes and low-jitter pulses from the mode- locked-laser are leveraged to perform signal clocking and quantizer pre-amplification, overcoming digital-to-analog converter (DAC) clock jitter and quantizer …
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Shuttling of ions for characterization of a microfabricated ion trap
… for shuttling. Next, the characteristics of a digital-to-analog converter (DAC) are calibrated, and this instrument is integrated into trapping experiments to test the viability of the analytic model. Combining theory with the capabilities of the DAC, I calculate that the new experimental …
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Low-Power System Design for Impedance-Based Structural Health Monitoring
… and aging structures. A structural health monitoring (SHM) system intends to identify damage on the structure under monitoring, so that necessary action can be taken in advance to avoid catastrophic results. Impedance-based SHM utilizes a piezoelectric ceramic as a collocated actuator and …
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Dynamic Element Matching Techniques For Delta-Sigma ADCs With Large Internal Quantizers
… internal quantizer resolution in delta-sigma analog-to-digital converters. Increasing the quantizer resolution in a delta-sigma modulator can increase SNR, improve stability and reduce integrator power consumption. However, each added bit of quantizer resolution also causes an exponential …
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A broadband Microwave Transceiver Front-end for an Airborne Software Defined Radio Experiment
… simulation, construction, and test of a wideband analog transceiver front-end for use in an airborne software defined radio (SDR) experiment. The transceiver must operate in the GSM-1800 and IEEE 802.11b/g WiFi frequency bands and accommodate beamforming. It consists of a transmitter and dual band …
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A Reconfigurable Digital-to-Analog Converter with Supply Invariant Linearity
<p>A novel reconfigurable digital-to-analog converter (DAC) with supply independent linearity is presented. The process agnostic converter achieves wide supply range operation and re-configurability by being charge based. This converter consists of a 7-bit parallel digital input control core and an …
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A highly digital, reconfigurable and voltage scalable SAR ADC
… include military surveillance, environmental monitoring, chemical detection and more recently, medical monitoring systems. Each node of the sensor network requires energy efficient circuits powered off small batteries or harvested energy. In such systems, a single reconfigurable analog-to-digital …
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Digital to Analog Converter Design using Single Electron Transistors
… of Moore's law. But all good things must come to an end. Researchers estimate that CMOS will reach a lower limit on feature size within the next 10 to 15 years. In order to assure further progress in the field, new computing architectures must be investigated. These nanoscale architectures are …
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Phase manipulation for efficient radio frequency transmission
… High linearity is required for modern digital communications standards, and often is achieved at the expense of efficiency. Outphasing architectures, which combine multiple nonlinear but efficient switching PAs into a system with an overall linear response, represent a promising …
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Techniques for low jitter clock multiplication
… significantly reduced random jitter compared to typical Phase-Locked Loops (PLL). This is achieved by introducing the reference signal directly into their voltage controlled oscillators (VCO) to realign the phase to the clean reference. However, the typical cost of this benefit is a …
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Low-power high-performance SAR ADC with redundancy and digital background calibration
… that require high-speed and high-accuracy analog-to-digital converters (ADCs). In SAR ADCs, the key linearity and speed limiting factors are capacitor mismatch and incomplete digital-to-analog converter (DAC)/reference voltage settling. In this the- sis, a sub-radix-2 SAR ADC is presented …
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Low-Voltage Analog CMOS Architectures and Design Methods
… design methods and architectures which allow analog circuits to operate at VT + 2Vds,sat, the minimum supply for CMOS circuits with all transistors in the active region where Vds,sat is the drain to source saturation voltage of a MOS transistor. Techniques which meet this criteria for …
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Techniques for high-performance digital frequency synthesis and phase control
This thesis presents a 3.6-GHz, 500-kHz bandwidth digital [delta][sigma] frequency synthesizer architecture that leverages a recently invented noise-shaping time-to-digital converter (TDC) and an all-digital quantization noise cancellation technique to achieve excellent in-band and out-of-band …
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An energy efficient CMOS interface to carbon nanotube sensor arrays
… extends upon the previously published work to optimize the energy performance through both the architecture and circuit level innovations. The 17-bit dynamic range is attained by distributing the requirement into a 10-bit Analog-to-Digital Converter (ADC) and a 8-bit Digital-to-Analog …
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Resonant Wavelength Tuning and CMOS Circuits for Silicon Photonic Transmitters with Microring Modulators
Microring modulators (MRMs) have emerged as a promising solution for silicon photonic optical transmitters, offering compact size, high bandwidth density, and energy-efficient operation compared to traditional Mach-Zehnder modulators (MZMs). MRMs are particularly advantageous for …
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Pre-compensation of nonlinear distortion of a silicon microring modulator in short reach systems
Silicon photonics has attracted significant attention due to its compatibility with CMOS technology and the potential for both discrete and integrated devices. As a critical component in silicon-based communication systems, silicon optical modulators have been widely investigated, including …
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Ultra-wideband Spread Spectrum Communications using Software Defined Radio and Surface Acoustic Wave Correlators
… offers inherent advantages such as the ability to coexist with previously allocated Federal Communications Commission (FCC) frequencies, simple transceiver architecture, and high performance in noisy environments. Spread spectrum techniques offer additional improvements beyond the conventional …
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