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Showing 1 to 5 of 5 for “"deep level traps"”.

  1. Study of Deep Levels in (100) and (311)B Molecular Beam Epitaxial Gallium-Arsenide by Constant-Capacitance Deep Level Transient Spectroscopy

    The study of deep level traps in molecular beam epitaxial (MBE) GaAs by constant capacitance deep level transient spectroscopy (CC-DLTS) has been divided into three parts. First, the deep level centers unique to MBE GaAs layers were identified; second, the effect of growth and annealing conditions …

    uiuc Repository record for Study of Deep Levels in (100) and (311)B Molecular Beam Epitaxial Gallium-Arsenide by Constant-Capacitance Deep Level Transient Spectroscopy (opens in a new tab)

  2. Study of deep level defects of N+-CdS/P-CdTe solar cells

    … as both act as beneficial dopants or detrimental traps unlike Si where intentional shallow dopants and traps are distinctly different. Therefore, the role of defect states on CdTe solar cell performance, the effect of processing on defect states, and simple and effective characterization …

    njit Repository record for Study of deep level defects of N+-CdS/P-CdTe solar cells (opens in a new tab)

  3. Complete electrical study of recombination properties of titanium and zinc deep levels in silicon

    … mechanisms of electron and hole recombination at deep level traps in semiconductors are studied. New variations of the capacitance and current transient techniques are developed which overcome two major experimental limitations: (1) capture is too fast, and (2) optical excitation and specially …

    uiuc Repository record for Complete electrical study of recombination properties of titanium and zinc deep levels in silicon (opens in a new tab)

  4. Metal-assisted chemical etching of semiconductor nanostructures for electronic applications

    … (CMOS) technology due to the deep-level traps. In this dissertation, sub-micron scale highly ordered crystalline silicon (c-Si) via array is demonstrated by MacEtch. The systematic study of etch rate as functions of catalyst diameter, pitch, and spacing experimentally …

    uiuc Repository record for Metal-assisted chemical etching of semiconductor nanostructures for electronic applications (opens in a new tab)

  5. Behavioral Modeling of CMOS SPADs Based on TCAD Simulations

    … an actual SPAD structure, described at physical level, which model is targeted. Simulate its fabrication process with Athena from the Silvaco tools suite to feed a TCAD simulator with an accurate model structure that can include fabrication defects. Extract its key parameters with TCAD simulation …

    sevilla Repository record for Behavioral Modeling of CMOS SPADs Based on TCAD Simulations (opens in a new tab)