Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
Results
Showing 1 to 20 of 100 for “"decoders"”.
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VLSI Architectures for Iterative Channel Decoders
… to the on-chip interconnect bottleneck of LDPC decoders. A new parameterized-core-based design methodology targeted for scalable and programmable LDPC decoders is proposed. The methodology solves the problems of excessive memory overhead, high latency, and complex on-chip interconnect typical of …
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Curriculum learning for polar and PAC decoders
Submission original under an indefinite embargo labeled 'Open Access'. The submission was exported from vireo on 2022-11-15 without embargo terms
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Optimal designs for linear and nonlinear precoders and decoders
… linear and DFE-based nonlinear precoders and decoders for the sake of improving the performance of transmission information rate and bit error rate. For linear scheme, we introduce a new criterion named weighted information rate criterion that generalizes our linear precoder and decoder …
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High -Throughput and Universal Architectures for Reed -Solomon Decoders
… arithmetic operations and universal Reed-Solomon decoders are investigated. A new method for embedding field elements in universal architectures is proposed so as to easily adapt the high-throughput architectures for field arithmetic operations to universal architectures. The properties of these …
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Graph-based decoders and divergence-rate estimators for data-hiding problems
… and show that the graph-based iterative decoders perform almost as well as if they had exact knowledge of the distortion channel parameters. Other desirable features of the graph-based decoders include the flexibility to adapt to other types of distortions and the ability to cope with the …
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Complete VLSI implementation of improved low complexity chase Reed-Solomon decoders
… design of improved low complexity chase (LCC) decoders for Reed-Solomon (RS) codes. This is the first attempt in published research that implements LCC decoders at the circuit level. Based on the joint algorithm research with University of Hawaii, we propose several new techniques for …
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Hardware/Software Co-Design Architecture and Implementations of MIMO Decoders on FPGA
… The hardware implementation of MIMO decoders becomes a challenging task as the complexity of the MIMO system increases. This thesis presents hardware/software co-design architecture and implementations of two typical lattice decoding algorithms, including Agrell and Vardy (AV) …
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The analysis and implementation of generic MPEG header and transport layer decoders
Thesis (S.B. and M.Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1999.
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High-level synthesis and its application in the design of Reed-Solomon decoders
… is versatile time-domain Reed-Solomon RS(n,k) decoders. The structure of the time-domain RS decoder is simple and modular which makes it fit for VLSI implementation. The first part of the thesis studies HLS and introduces a Computer-Aided-Design (CAD) tool which can be used for designing an …
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Design space exploration of binary algebraic hard decision decoders for data center connectivity
Submission published under a 24 month embargo labeled 'Closed Access', the embargo will last until 2027-08-01
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Trapping Sets of Iterative Decoders for Quantum and Classical Low-Density Parity-Check Codes
… computation. Error correction codes and their decoders perform this step by adding redundant information that aids the decoder to recover or protect the logical information even in the presence of noise. Low-density parity-check (LDPC) codes have been one of the most popular error correction …
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On existence, stability, accuracy and learning of approximate decoders for ill-posed inverse problems
… problems in imaging, another phenomenon of DL decoders yielding false yet realistic looking artefacts, coined AI generated hallucinations, has been reported on. This thesis explores the use of DL in inverse problems and aims at providing a theoretical basis for assessing the stability and …
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Decoding algorithms using side-effect machines
… Previous research has not addressed edit metric decoders. Decoders for quaternary edit metric codes are finding use in bioinformatics problems with applications to DNA. By using side effect machines we hope to be able to provide efficient decoding algorithms for this open problem. Two ideas for …
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Space-Time Coding with Offset Modulations
… relative to the optimum detector. Three decoders for STC encoded OQPSK are presented. One decoder has a bit error rate performance that matches the SISO case but with much higher complexity than that of the QPSK decoder. A second decoder matches the simplicity of the decoder for STC …
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Unreliable and resource-constrained decoding
… theory and communication theory assume that decoders are noiseless and operate without transient or permanent faults. Decoders are also traditionally assumed to be unconstrained in physical resources like material, memory, and energy. This thesis studies how constraining reliability and …
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Inference Generation and Reading Disability
… reading disability, poor comprehenders and poor decoders were compared with chronological age-matched typical readers. In Experiments 1, 2, 3 and 4 a self-paced reading paradigm was employed to assess on-line inference generation. Reading times to target sentences that were consistent and …
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Linear Programming Decoding for Non-Uniform Sources and for Binary Channels With Memory
… over channels with memory. We develop two decoders for the scenario of non-uniform memoryless sources transmitted over memoryless channels. The first decoder uses a modified linear cost function which incorporates the a-priori source information and works with systematic codes. The second …
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Improved handling of the decoding operation in the Presto compiler
… mainly in terms of area; this involves sharing decoders driven by related inputs, and map decoders using fewer number of boolean gates. Algorithms presented in this thesis were implemented in the Presto HDL compiler. A series of tests were conducted using real-world HDL designs in order to …
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On a Viterbi decoder design for low power dissipation
… in digital wireless communications. Viterbi decoders are used to decode convolutional codes. Viterbi decoders employed in digital wireless communications are complex and dissipate large power. With the proliferation of battery powered devices such as cellular phones and laptop computers, …
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