Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
Results
Showing 1 to 20 of 34 for “"datapath"”.
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A low-power 32 bit datapath design
Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2000.
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The design of low-power digital datapath circuits
Thesis (M.Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2000.
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Exposing datapath elements to reduce microprocessor energy consumption
… of exposing elements in a processor's datapath to the compiler in order to reduce energy consumption. We focus on eliminating register file traffic by exposing the latches in the bypass network, as our study shows that there is potential for significant benefit by doing this. We present …
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Designing a congestion control plane datapath with QUIC
This work explores developing datapaths for the recently proposed Congestion Control Plane (CCP) architecture and uses QUIC as a case study to build and evaluate an example datapath. The CCP moves congestion control logic off of the datapath into a separate agent running in user-space. Now, …
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VLSI datapath choices : cell-based versus full-custom
Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1998.
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A MIPS datapath simulator for enhancing visual learning of computer architecture
In this thesis, I introduce the Datapath Simulator—a tool for visually teaching the fundamentals of hardware architecture. Built over the 2019-2020 academic year, the Simulator allows course staff and students to virtually build and explore hardware architecture circuits. The Datapath Simulator is …
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Design and implementation of the integer unit datapath of the MAP cluster of the M-machine
Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1996.
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Encoding Problems in Controller Synthesis
… systems design circuits that consist of a datapath and a controller. The datapath is a network of modules that is capable of performing the specified behavior. The controller is a circuit that delivers the proper sequence of control signals to the modules of the datapath. The activity in …
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The design and implementation of a congestion control plane
… by placing them in a separate agent outside the datapath. Each datapath-such as the Linux kernel TCP, UDP-based QUIC, or kernel-bypass transports like mTCP-on-DPDK-summarizes information about packet round-trip times, receptions, losses, and ECN via a well-defined interface to algorithms running …
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A hierarchical verification of the IEEE-754 table-driven floating-point exponential function using HOL
… one of the most important standards. Deep datapath and algorithm complexity have made the verification of such floating-point units a very hard task. Most simulation and reachability analysis verification tools fail to verify a circuit with a deep datapath like most industrial …
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Robust and reliable hardware accelerator design through high-level synthesis
… designs is hybrid tracing: comparing a datapath-level trace of hardware execution with a reference software implementation at a fine temporal and spatial granularity to detect logic bugs. An integrated backtrace process delivers source-code meaning to the hardware designer, pinpointing …
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Enabling Configurable, Extensible, and Modular Network Stacks
… control algorithm implementations from network datapaths by designing an abstract datapath which supports collecting custom measurements and subsequently applying rate or window enforcement.
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A high resolution programmable thermal test chip
… a 12×14 array of controllable heaters using real datapath elements and distributed temperature sensors, allowing systematic evaluation of transient and steady-state thermal responses of behavior equivariant to real chips.
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Architecture and Applications of a Unifield-Type Computer
… a unary-serial SIMD (Single Instruction Multiple Datapath) architecture; the unique features of this architecture are the unary representation that allows simple arithmetic operations to be performed in the same registers in which the numbers are stored, and, a novel interconnection scheme that …
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Design and implementation of low-latency, low-power reconfigurable on-chip networks
… the embedding of low-swing cells into the NoC datapath, paving the way for low-swing signaling to be part of future many-core chips [17]. Third, clockless repeated links have been shown to be embeddable within a NoC datapath, allowing packets to go from source to destination cores without being …
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Microprocessor energy characterization and optimization through fast, accurate, and flexible simulation
… are implemented that target the entire datapath and cache energy consumption. The individual energy optimizations are analyzed in detail, and the microprocessor design is characterized using various energy breakdowns and studies of the bit correlation between data values. This work shows …
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Asynchronous Data Processing Platforms for Energy Efficiency, Performance, and Scalability
… of the performance and energy efficiency. Datapath control logic with NULL Cycle Reduction (NCR) and arbitration network are incorporated in the heterogeneous platform for large scale cascading. The platforms have been integrated with the data processing units using the IBM 130 nm 8RF …
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Scalable multi-access flash store for Big Data analytics
… controller. The controller is located in the datapath between the storage and the host, and provides hardware acceleration for applications without any additional latency. We have constructed a small-scale prototype whose network bandwidth scales directly with the number of nodes, and where …
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An energy efficient AES engine with DPA-resistance
… and 16 S-boxes placed in the encryption datapath allow the parallel operation of 16 bytes of encryption data at supply voltages in the subthreshold region while maintaining more than tens of Mbps throughput rate. The energy efficient AES core, which does not incorporate techniques to …
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Low-voltage embedded biomedical processor design
… demonstrates a new control scheme to reduce datapath switching activity, and a modified CORDIC engine features increased input range and decreased quantization error over conventional designs. At the system level, the addition of accelerators increases leakage power and bus loading; …
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