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Showing 1 to 4 of 4 for “"crossbar architecture"”.

  1. Providing QoS guarantees in input buffered crossbar switches with speedup

    … Quality of Service guarantees in input-buffered crossbar switches with speedup. It is shown that speedup of 4 is sufficient to ensure 100% asymptotic throughput with any maximal matching algorithm employed by the arbiter. It is also demonstrated that the crossbar architecture is capable of …

    mit Repository record for Providing QoS guarantees in input buffered crossbar switches with speedup (opens in a new tab)

  2. Integration of resistive switching devices in crossbar structures

    … memory elements or switches, and nano crossbar architecture, which defer these physical limits sustainably. The nano crossbar architecture consists of a functional component that is integrated between two perpendicularly crossing metallization lines. This configuration allows for a high …

    aachen Repository record for Integration of resistive switching devices in crossbar structures (opens in a new tab)

  3. Null Convention Logic applications of asynchronous design in nanotechnology and cryptographic security

    … is the Asynchronous Nanowire Reconfigurable Crossbar Architecture (ANRCA); the second one is an asynchronous S-Box design for cryptographic system against Side-Channel Attacks (SCA). The following are the contributions of the first application: 1) Proposed a diode- and resistor-based ANRCA …

    must-thes Repository record for Null Convention Logic applications of asynchronous design in nanotechnology and cryptographic security (opens in a new tab)

  4. Design and analysis of memristor-based reliable crossbar architectures

    … problems that must be resolved before memristive architectures become mainstream are related to their reliability. One of such reliability issue is the sneak-paths current which limits the maximum crossbar array size. This thesis presents various designs of the memristor based crossbar

    oxford-brookes Repository record for Design and analysis of memristor-based reliable crossbar architectures (opens in a new tab)