Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
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Showing 1 to 3 of 3 for “"clock distribution network"”.
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Clock distribution network techniques
Clock distribution networks are essential to synchronous systems. The design of these networks affects the system performance dramatically and sometimes determines whether the chip can function properly or not. This thesis first describes in detail how a synchronous system works. Based on the …
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Single event upset hardened CMOS combinational logic and clock buffer design
… hardening. Recent studies have also shown that clock distribution network is becoming increasingly vulnerable to radiation strike due to reduced capaci-tance at the clock leaf node. A strike on clock leaf node may propagate to many flip-flops increasing the system SER considerably. In this …
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Application of three-dimensional circuit integration to global clock distribution
… significant effect on system performance is the clock signal. In this paper utilization of three-dimensional circuit integration to reduce the negative effects of technology scaling on clock signal distribution is investigated. A design is proposed that removes the clock distribution network from …