Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
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Showing 1 to 17 of 17 for “"branch prediction"”.
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Branch Prediction For Network Processors
… implemented on the data-plane while reducing the branch penalty associated with these architectures.
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Summarizing multiprocessor program execution with versatile, microarchitecture-independent snapshots
… the time spent to simulate the memory system and branch predictors. The Memory Timestamp Record (MTR) summarizes the directory and cache state of a multiprocessor system in a compact data structure. A single MTR snapshot is versatile enough to reconstruct the microarchitectural state resulting …
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High Performance Applications for the Single-Chip Message-Passing Parallel Computer
… using techniques such as out-of-order execution, branch prediction, and dynamic scheduling, designers have found ways to speed execution. However, growing architectural complexity has led to unsustained development and testing times. Shrinking feature sizes are causing increased wire resistances …
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Run -Time Optimization Architecture
… deployment mechanism uses an extension to the branch prediction mechanism to migrate execution into the new code without modifying the original code. These new components do not add delay to the execution of the program except during short bursts of reoptimization, because they operate in …
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Static Program Analysis to Enhance Profile Independence in Instruction-Level Parallelism Compilation
… improves the state of the art in static branch prediction, and investigates the problems associated with static loop-trip-count prediction and static frequency generation. For the case of differing branch behavior, this dissertation proposes the use of the speculative hedge heuristic …
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Mechanized proofs that hardware is safe from timing attacks
… but also on various optimizations such as branch prediction and memory caching implemented by the underlying hardware the program runs on. We make use of Kami, a domain-specific language for describing and formally verifying hardware modules, to build a system for constructing …
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Two concrete problems in timing analysis of embedded software
… effect of features such as pipeline, cache and branch prediction. At the programming language level it is required to detect the infeasible paths in the program and use that information for giving a tight bound on the WCET of the program. At the micro-architectural level, the presence of caches …
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Evolve : a preliminary multicore architecture for Introspective Computing
… software systems: the Dynamic Partner-Assisted Branch Predictor and the Introspective L2 Memory System (IL2). The branch predictor employs a partner core as a coprocessor engine for general dynamic branch prediction in a corresponding code core. The IL2 retasks the silicon resources of partner …
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Control Flow Merging: A Compiler Transformation to Mitigate Branch Misprediction by Branch Elimination
… can stall the pipeline and interrupt execution. Branch prediction is widely adopted in modern architectures to mitigate control flow hazards, yet even sophisticated predictors struggle to handle branches driven by random data. Each misprediction flushes speculative instructions and restarts …
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Implementation of a Hardware-Optimized MPI Library for the SCMP Multiprocessor
… using techniques such as out-of-order execution, branch prediction, dynamic scheduling, and predication. While these techniques enable greater performance, they also increase the complexity and silicon area of the design. This creates larger development and testing times. The shrinking feature …
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Design and evaluation of an optimistic CPU: the warp engine
… pipelining, out-of-order execution, and branch prediction are techniques that improve performance in processors by manipulating the flow of instructions. These control flow manipulations alone are not adequate to allow large numbers of instructions to execute in parallel because …
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Split array and scalar data cache: A comprehensive study of data cache organization.
… including instruction and data prefetching, branch-prediction buffers. The potential benefits of such techniques for embedded applications have been evaluated in my work. I also explore how my cache organization performs for non-numeric data structures. I propose a novel idea called "Data …
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Productive Programming Systems for Heterogeneous Supercomputers
… included (e.g. large and deep cache hierarchies, branch prediction logic, pre-fetch logic) makes them flexible enough to run a wide range of applications fast. However, we have started to see growth in the use of lightweight, simpler, energy-efficient, and functionally constrained cores. These …
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Arithmetic data value speculation.
… a general purpose processor. ADVS is similar to branch prediction, an arithmetic instruction is issued to an exact arithmetic unit and an approximate arithmetic unit which provides an approximate result faster than the exact counterpart. The approximate result is forwarded to dependent operations …
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Re-examining dual path processing
Submission original under an indefinite embargo labeled 'Open Access'. The submission was exported from vireo on 2022-11-11 without embargo terms
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Methodologies and tools for computation offloading on heterogeneous multicores
… of data transfer between PPU and SPU, lack of branch prediction unit, limited SIMDizability, expensive scalar code etc. In particular, the designers of the Cell have opted for software controlled memory on its SPUs to reduce power consumption and to give programmers more control over the …
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Design And Analysis Of Time-Predicatable Single-Core And Multi-Core Processors
… architecture such as cache memories and branch prediction are in favor of average-case performance, which can significantly compromise the time predictability and make accurate worst-case performance analysis extremely difficult if not impossible. Therefore, the time predictability of …