Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
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Showing 1 to 14 of 14 for “"Xeon Phi"”.
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An Optimized Multiple Right-Hand Side Dslash Kernel for Intel Xeon Phi
… point coprocessor cards such as GPUs and Intel Xeon Phi Knights Corner (KNC), which boast powerful vector processing units. Most of these efforts in the area of Dslash have focused on single right-hand side solvers. This thesis will present two optimized Dslash kernels which simplify …
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Perfilagem do problema de resolução da equação da onda por diferenças finitas em coprocessador Xeon Phi
Software Optimization is a promising technique to scientific computing applications, which can have calculations that may require several hours or even days. The idea of this work is to validate, using performance metrics, the optimization of a finite differences code that solve the wave equation …
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Simulating Nonlinear Neutrino Oscillations on Next-Generation Many-Core Architectures
… It can run on both the CPU and the Xeon Phi co-processor, the latter of which is based on the Intel Many Integrated Core Architecture (MIC). The performance of XFLAT on various system configurations and physics scenarios has been analyzed. In addition, the impact of I/O and the …
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Exploring Performance Portability for Accelerators via High-level Parallel Patterns
… e.g., multi-core CPUs, many-core GPUs (Graphics Processing Units) and Intel Xeon Phi. The performance gains from them can be as high as many orders of magnitude, attracting extensive interest from many scientific domains. However, the gains are closely followed by two main problems: (1) A …
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On implementing sparse matrix-vector multiplication on intel platform
… kernel that realizes high performance on Intel Xeon multicore and Phi processors for unstructured matrices. CCF kernel exploits the properties of CCF to enhance load balancing and SIMD efficiency. Moreover, we present the CCF auto-tuner that selects the most effective parameters and the SpMV …
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On-node performance optimization of a Monte-Carlo transport code for leadership architectures
… on modern Intel micro-architectures (i.e., Intel Xeon Phi and Intel Xeon Platinum 8180) to understand what hardware and settings configurations were optimal. The specific modules and subroutines that were responsible for the performance drop were also highlighted. The first round of optimizations …
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A Compiler Framework to Support and Exploit Heterogeneous Overlapping-ISA Multiprocessor Platforms
… (in our case a platform built with Intel Xeon - Xeon Phi). With the introduced Profiler, Partitioner, and Runtime support, we prove to be able to automatically exploit the heterogeneity in an overlapping-ISA platform, being faster than native execution and other parallelism programming …
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Performance analysis and optimization of a CFD application
… on a dual-socket node fitted with an Intel Xeon Phi MIC card. To reduce the overhead created by host-accelerator copies in heterogeneous execution, the data layout of the halo region was changed from a ''star'' shape to a ''box'' shape to agglomerate small communications and to create a …
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Modeling and Runtime Systems for Coordinated Power-Performance Management
… on Intel x86 systems with accelerators of Intel Xeon Phi and a Nvidia general-purpose graphics processing unit (GPGPU). We show the trade-offs and potentials for improving efficiency. Furthermore, we propose a parallel performance model for coordinating DVFS, DMT, and DCT simultaneously. We …
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Directive-Based Data Partitioning and Pipelining and Auto-Tuning for High-Performance GPU Computing
… potential of accelerators, such as graphics processing units (GPUs), field-programmable gate arrays (FPGAs), and co-processors (e.g., Intel Xeon Phi), due to their increasing use in state-of-the-art supercomputers. Over the past 10 years, we have seen a significant improvement in both …
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Productive Programming Systems for Heterogeneous Supercomputers
… of NVIDIA Pascal GPUs, Intel Knights Landing Xeon Phi processors, the Epiphany Co-Processor, the Sunway MPP, and other throughput-oriented architectures that enable pre-exascale computing. However, while the majority of the FLOPS in designs for future HPC systems come from throughput-oriented …
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Development of the random ray method of neutral particle transport for high-fidelity nuclear reactor simulation
… computing systems, including CPU, GPU, and Intel Xeon Phi architectures. While 2D MOC has long been used in reactor design and engineering as an efficient simulation method for smaller problems, the transition to 3D has only begun recently, and to our knowledge no 3D MOC based codes are currently …
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Coupled-Cluster Methods for Large Molecular Systems Through Massive Parallelism and Reduced-Scaling Approaches
… computers equipped with conventional Intel Xeon processors and the Intel Xeon Phi (Knights Landing) processors. With the new implementation, the CCSD(T) energies can be evaluated for systems containing 200 electrons and 1000 basis functions in a few days using a small size commodity cluster, …
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Neuromorphic Learning Systems for Supervised and Unsupervised Applications
… the large-scale implementation of neuromorphic learning models and pushed the research on computational intelligence into a new era. Those bio-inspired models are constructed on top of unified building blocks, i.e. neurons, and have revealed potentials for learning of complex information. …