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Showing 1 to 4 of 4 for “"Wildforce"”.

  1. A Scaleable FIR Filter Implementation Using 32-bit Floating-Point Complex Arithmetic on a FPGA Base Custom Computing Platform

    … developed on a custom computing platform called WILDFORCE. The work has been motivated by ways to off-load intensive computing tasks to hardware for indoor communications channel modeling. The design entails complex convolution filters with customized lengths that can support channel impulse …

    vt Repository record for A Scaleable FIR Filter Implementation Using 32-bit Floating-Point Complex Arithmetic on a FPGA Base Custom Computing Platform (opens in a new tab)

  2. Unstructured Finite Element Computations on Configurable Computers

    … multiplication and is performed on the Wildforce board, a configurable platform. The matrix-by-vector multiplication units developed in this thesis are basic mathematical units implemented on a configurable platform and can be used to accelerate any mathematical solution that involves …

    vt Repository record for Unstructured Finite Element Computations on Configurable Computers (opens in a new tab)

  3. Distributed Reconfigurable Simulation for Communication Systems

    … system model has been created using a WildForce board, a reconfigurable device, and the performance is compared to a traditional software simulation of the same system. Using the reconfigurable device, the performance was increased by approximately one hundred times. This demonstrates …

    vt Repository record for Distributed Reconfigurable Simulation for Communication Systems (opens in a new tab)

  4. Implementation and Performance of an Improved Turbo Decoder on a Configurable Computing Machine

    Turbo codes are a recently discovered class of error correction codes that achieve near-Shannon limit performance. Because of their complexity and highly parallel nature, turbo-coded applications are well suited for configurable computing. Field-programmable gate arrays (FPGAs), which are the main …

    vt Repository record for Implementation and Performance of an Improved Turbo Decoder on a Configurable Computing Machine (opens in a new tab)