Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
Results
Showing 1 to 8 of 8 for “"Wafer Fab"”.
-
Evaluation of scheduling strategies in a semiconductor wafer fab using simulation
Thesis (M.S.)--Massachusetts Institute of Technology, Sloan School of Management, 1992.
-
Accelerating time-to-money for a semiconductor wafer fab capacity ramp
Thesis (M.S.)--Massachusetts Institute of Technology, Sloan School of Management, 1996, and Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Materials Science & Engineering, 1996.
-
A Mathematical Programming Based Procedure for the Scheduling of Lots in a Wafer Fab
… scheduling because of the unique features of the wafer fab. This research addresses the need to develop an approach, which can be used to generate optimal or near-optimal solutions to the scheduling problem of a wafer fab, by using Mathematical Programming for a general case of a wafer fab. The …
-
Machine Learning Methods for Automated Macro-Inspection and Improved Defect Identification in Semiconductor Manufacturing
… macro-inspection capability of defects on wafers at a semiconductor wafer fab. First, an investigation into the performance of current inspection tools is done, revealing results that are not reliable nor reproducible. Tool maintenance procedures and specification adjustments are …
-
Strategic planning for LEED certification
… facilities, it has not been applied to many wafer manufacturing facilities (fabs), which house the manufacturing and production of Intel's microprocessors. Wafer fabs have much higher energy and water consumption levels than typical buildings due to their strictly controlled temperature, …
-
Printed electronics : the next inkjet revolution
… a very compelling alternative to the expensive wafer fab processing required to produce today's flat panel displays and circuits. Each of these industries is analyzed in considerable depth to provide context for assessing the disruptive potential of inkjet. The potential of inkjet to become an …
-
Impact of Lot Dedication on the Performance of the Fab
… most complex of the operations involved in the fabrication of a wafer, and it requires the greatest precision. Photolithography is used to create multiple layers of circuit patterns on a chip. Traditionally, wafer fab operations, and in particular, those performed in the photolithography …
-
Lot Sizing at the Operational Planning and Shop Floor Scheduling Levels of the Decision Hierarchy of Various Production Systems
… using the simulation of a real-life wafer fab, reveals that the proposed approach outperforms the existing practice (which is based on "first-in-first-out" (FIFO) model and an ad-hoc lot sizing method). Significant improvements are obtained in both mean values and standard deviations …