Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
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Showing 1 to 15 of 15 for “"Virtex-5"”.
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High-speed dynamic partial reconfiguration for field programmable gate arrays
… (i) one targeting the Hard IP PowerPC405 on Virtex-4, (ii) a second targeting the Soft IP MicroBlaze on Virtex-5, (iii) a third targeting the Hard IP PowerPC440 on Virtex-5, and (iv) a fourth system targets the Hard IP PowerPC440 on Virtex-5 capable of adaptive feedback. The adaptive feedback …
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Implementation of Directional Median Filtering using Field Programmable Gate Arrays
… implementation methods were designed for Xilinx Virtex 5 FPGA devices but were also attempted on Spartan 3E. The proposed methods used less than 30% of the resources on Virtex 5 FPGA but the resource utilization on Spartan 3E exceeded the number of available resources. After an initial delay, …
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A timeshared, runtime reconfigurable hardware co-processing architecture
… reprogramable peripheral synthesized on a Xilinx Virtex-5 FPGA and discuss its performance implications.
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Hybrid FPGA and GPP Implementation of IEEE 802.15.4 Physical Layer
… channelizer is implemented on the external Virtex 5 FPGA, while the IEEE 802.15.4 receiver is implemented in GNU Radio on the host. The first case demonstrates how spare resources in USRP's FPGA can be used to implement signal processing task while still interfacing with GNU Radio. The …
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Open-Source Bitstream Generation for FPGAs
… primitives. Initial support is limited to the Virtex-5 and Virtex-7 family of FPGAs from Xilinx, but it can be extended to other Xilinx architectures. Nearly all routing resources in the device, as well as the most common logic resources are supported by this work.
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Adaptation of a fault–tolerant FPGA–based launch sequencer as a CubeSat payload processor
… performance requirements of the processor. The Virtex–5 (registered trademark of Xilinx, Inc.) is selected over the ProASIC3 (registered trademark of Microsemi, Inc.) due to its enhanced capabilities and potential to support expansion for future applications. The hardware design is presented as …
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Implementação em hardware reconfigurável do algoritmo de criptografia clefia com suporte completo à expansão de chaves
… do circuito em um dispositivo Xilinx Virtex 5 sugerem que taxas de transferência superiores a 1 Gbps podem ser alcançadas com baixo custo em termos de área, com medidas de eficiência semelhantes àquelas apresentadas pelo estado da arte.
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Reconfigurable System-on-Chip Architecture for Neural Signal Processing
… system was realized in a platform FPGA (Xilinx Virtex-5 LX110T). The system was tested using extracellular neural recordings from three different animals, a owl monkey, a macaque and a rat. Operational performance of the system is demonstrated for a 300 channel neural interface. Scaling the …
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Enhancing GNU Radio for Hardware Accelerated Radio Design
As technology evolves and new methods for designing radios arise, it becomes necessary to continue the search for fast and flexible development environments. Some of these new technologies include software defined radio (SDR), Field Programmable Gate Arrays (FPGAs), and the open source project GNU …
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On the realisation of sequential fast fourier transform for orthogonal frequency division multiplexing based on field programmable gate array
… been simulated, synthesized and implemented on a Virtex 5/Xilinx FPGA.
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Implementation of the Transmitting Functionality on the TIGER-3 FPGA-based Transceiver Platform
… The TIGER-3 transceiver is built around a Virtex-5 FPGA that is connected to various peripherals such as ADCs, DACs, and digital step attenuators that make it perfectly suited to a wide variety of HF radar applications. Currently, the mode of operation of the TIGER-3 platform is limited, as …
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Framework for Hardware Agility on FPGAs
As hardware applications become increasingly complex, the supporting technology needs to evolve and adapt to the demands. Field Programmable Gate Array (FPGA), Application Specific Integrated Circuit, General Purpose Processor, and System on Chip are the preferred devices for solving computational …
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FPGA structures for high speed and low overhead dynamic circuit specialization
… on three different Xilinx FPGA platforms: Virtex-II Pro, Virtex-5, and Zynq-SoC. The study of how DCS behaves and what is its overhead in the evolution of the three FPGA platforms is the non-trivial basis to discover the costs of DCS. After that, I propose custom FPGA structures …
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X-ray microscope performance enhancement through control architecture change
The goal of this thesis is to apply control algorithms to improve the performance of nanopositioning devices used on the beamline in Advanced Photon Source (APS) at Argonne National Laboratory (ANL). A prototype device, better known as the Early User Instrument (EUI) was the subject of this work. …