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Showing 1 to 13 of 13 for “"Vector processor"”.

  1. Vector processor services for local area networks

    Vector processors conventionally have been used as an attached processor to a host computer. Within this limited scope, the application programmer must use the host computer in order to benefit from the vector processor resources. By using a local area network, programmers are no longer constrained …

    vt Repository record for Vector processor services for local area networks (opens in a new tab)

  2. Vector processor virtualization: distributed memory hierarchy and simultaneous multithreading

    … and VLIW (Very Long Instruction Word) processors, along with SIMD (Single-Instruction Multiple-Data) and vector processor (VP) accelerators, are among the available options for designers to accomplish their desired requirements. On the other hand, these choices turn out to be large …

    njit Repository record for Vector processor virtualization: distributed memory hierarchy and simultaneous multithreading (opens in a new tab)

  3. Instruction fusion and vector processor virtualization for higher throughput simultaneous multithreaded processors

    … performance gains for new generation microprocessors. To alleviate its impact, an instruction fusion technique is first proposed for multiscalar and many-core processors. With instruction fusion, similar copies of an instruction to be run on multiple pipelines or cores are merged into a …

    njit Repository record for Instruction fusion and vector processor virtualization for higher throughput simultaneous multithreaded processors (opens in a new tab)

  4. Making Computation on Encrypted Data Practical through Hardware Acceleration of Fully Homomorphic Encryption

    … challenges. These include operations on large vectors with complex dependencies that current vector processor architectures cannot handle, as well as extreme memory bandwidth demands. This thesis presents two FHE accelerators that address these challenges: F1 and CraterLake. F1 is the őrst …

    mit Repository record for Making Computation on Encrypted Data Practical through Hardware Acceleration of Fully Homomorphic Encryption (opens in a new tab)

  5. The efficient use of vectorized direct solvers in computational fluid dynamics

    The feasibility of using a vectorized banded direct solver for the compressible Euler and Navier-Stokes equations is examined for both single-grid and multi-grid strategies. A procedure is developed for comparing the computational effort required for the direct method with that of the vertical line …

    vt Repository record for The efficient use of vectorized direct solvers in computational fluid dynamics (opens in a new tab)

  6. Hardware implementation of an automatic adaptive centralized under frequency load shedding

    … Phasor Measurement Units (PMUs), Synchrophasor Vector Processor (SVP) that resembles real time system operation. The study examines disturbance effects on the frequency at different disturbance locations. Each time the algorithm decisions are able to restore system frequency to a safe level and …

    utc Repository record for Hardware implementation of an automatic adaptive centralized under frequency load shedding (opens in a new tab)

  7. Performance comparison between Dual-blinder and a Phasor-based Out of Step detection functions using hardware in the loop test

    … a protective relay, and a Synchrophasor Vector Processor (SVP). The evaluation shows that the Phasor-Based function predicted the OOS before the Dual-Blinder OOS function when the power system was having damping problems. In other cases, the Dual-Blinder OOS function tripped faster in …

    utc Repository record for Performance comparison between Dual-blinder and a Phasor-based Out of Step detection functions using hardware in the loop test (opens in a new tab)

  8. Adaptive underfrequency load shedding based on real time simulation

    … System (GPS) clocks, PMUs and Synchrophasor Vector Processor (SVP). The results obtained show that the adaptive UFLS scheme restored the frequency and curtailed the load based on voltage sag. Furthermore, the results are compared with conventional UFLS scheme.

    utc Repository record for Adaptive underfrequency load shedding based on real time simulation (opens in a new tab)

  9. Designing a Programmable Hardware Accelerator for Fully Homomorphic Encryption

    … reveals acceleration opportunities. F1 is a wide-vector processor with novel functional units deeply specialized to FHE primitives, such as modular arithmetic, number-theoretic transforms, and structured permutations. Due to the static nature of FHE computations, F1 uses an exposed ISA, requiring …

    mit Repository record for Designing a Programmable Hardware Accelerator for Fully Homomorphic Encryption (opens in a new tab)

  10. Computer simulation of shear flow in simple fluids

    … of hours of computer time. The arrival of a vector processor at the A.N.U. has necessitated the experimentation with algorithms, with substantial performance gains over a standard code. These increases in performance have allowed us to complete a thorough study of shear flow at constant …

    aus-cath Repository record for Computer simulation of shear flow in simple fluids (opens in a new tab)

  11. Computer simulation of shear flow in simple fluids

    … of hours of computer time. The arrival of a vector processor at the A.N.U. has necessitated the experimentation with algorithms, with substantial performance gains over a standard code. These increases in performance have allowed us to complete a thorough study of shear flow at constant …

    anu Repository record for Computer simulation of shear flow in simple fluids (opens in a new tab)

  12. Approximate computing: An integrated cross-layer framework

    … circuits to build programmable approximate processors, and (iii) At the software level, methods to apply approximate computing to machine learning classifiers, which represent an important class of applications that are being utilized across the computing spectrum. Towards this end, the …

    purdue-thes Repository record for Approximate computing: An integrated cross-layer framework (opens in a new tab)