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Showing 1 to 20 of 32 for “"VLSI technology"”.

  1. An I/O algorithm and a test algorithm for a reconfigurable cellular array

    Recent advances in VLSI technology have stimulated research efforts in the area of highly reliable fault tolerant, general purpose computing systems, notably, parallel systems. An automatically reconfigurable, fault-tolerant, parallel architecture is suited to VLSI technology. The architecture, a …

    vt Repository record for An I/O algorithm and a test algorithm for a reconfigurable cellular array (opens in a new tab)

  2. Parallel architectural simulations on shared memory multiprocessors

    … systems made possible by the rapid advances in VLSI technology and computer architecture, have resulted in simulations which require excessive amounts of processing power and memory. One way to meet these requirements of detailed computer simulations is to execute them on multiprocessors.

    uiuc Repository record for Parallel architectural simulations on shared memory multiprocessors (opens in a new tab)

  3. The E-algorithm: an automatic test generation algorithm for hardware description languages

    … the increasing levels of integration achieved by VLSI technology. This thesis presents a test generation algorithm, the E-algorithm, that generates tests for circuits described using the VHDL Hardware Description Language. A fault model has been developed that addresses data path faults, faults in …

    vt Repository record for The E-algorithm: an automatic test generation algorithm for hardware description languages (opens in a new tab)

  4. Use of architectural-level primitives in system-level diagnosis and speed up of test vector generation

    … of defects. The very large scale integration (VLSI) test generation problem has been one of the most complex and time-consuming problems. This is a major bottleneck in the design cycle of the circuit. The problem is further complicated by rapid advances in VLSI technology, such as in CMOS, …

    uiuc Repository record for Use of architectural-level primitives in system-level diagnosis and speed up of test vector generation (opens in a new tab)

  5. Efficient design and implementation of image processing algorithms on reconfigurable hardware using Handel-C

    … purpose hardware for speed. With advances in the VLSI technology hardware implementation has become an attractive alternative. Assigning complex computation tasks to hardware and exploiting the parallelism and pipelining in algorithms yield significant speedup in running times. In this thesis the …

    unlv Repository record for Efficient design and implementation of image processing algorithms on reconfigurable hardware using Handel-C (opens in a new tab)

  6. High Performance Architecture using Speculative Threads and Dynamic Memory Management Hardware

    … the advances in very large scale integration (VLSI) technology, hundreds of billions of transistors can be packed into a single chip. With the increased hardware budget, how to take advantage of available hardware resources becomes an important research area. Some researchers have shifted from …

    unt Repository record for High Performance Architecture using Speculative Threads and Dynamic Memory Management Hardware (opens in a new tab)

  7. Integration of HOL and MDG for hardware verification

    … digital systems and the size of the circuits in VLSI technology, the role of design verification has gained a lot of importance. Theorem Proving based verification and Decision Diagram based verification are now-a-days the two main techniques used for formal verification. Each of them has its own …

    concordia Repository record for Integration of HOL and MDG for hardware verification (opens in a new tab)

  8. Mapping regular recursive algorithms to fine-grained processor arrays

    With the continuing growth of VLSI technology, special-purpose parallel processors have become a promising approach in the quest for high performance. Fine-grained processor arrays have become popular as they are suitable for solving problems with a high degree of parallelism, and can be …

    uiuc Repository record for Mapping regular recursive algorithms to fine-grained processor arrays (opens in a new tab)

  9. Efficient multidimensional uncertainty quantification of high speed circuits using advanced polynomial chaos approaches

    With the scaling of VLSI technology to sub-45 nm levels, uncertainty in the nanoscale manufacturing processes and operating conditions have been found to result in unpredictable circuit behavior at the chip, package, and board levels of modern integrated microsystems. Hence, modeling the forward …

    colostate Repository record for Efficient multidimensional uncertainty quantification of high speed circuits using advanced polynomial chaos approaches (opens in a new tab)

  10. Substrate and channel engineering for improving performance of strained-SiGe MOSFETs

    With VLSI technology moving closer towards fundamental physical limits, a way to further improve the transistor drive current for superior circuit performance is enhancing the average velocity of carriers in the channel. In order to enable technology boosters like strained channels on the …

    mit Repository record for Substrate and channel engineering for improving performance of strained-SiGe MOSFETs (opens in a new tab)

  11. A virtual machine approach to parallel debugging

    … applications even though recent progress on VLSI technology has significantly reduced the cost of building these machines. In this thesis, a two-phase approach to debugging parallel applications based on task-oriented virtual machines is proposed. In the first phase, a message passing event …

    ubc Repository record for A virtual machine approach to parallel debugging (opens in a new tab)

  12. Syndrome signature in built-in self-testing of VLSI circuits.

    … become very important in the context of modern VLSI and is a severe challenge for testing engineers. A number of basic analytic and heuristic methods exists for the solution of the fault detection and location problem in combinational circuits. Classical testing of combinational circuits …

    ottawa-retro Repository record for Syndrome signature in built-in self-testing of VLSI circuits. (opens in a new tab)

  13. Hierarchical test generation for CMOS circuits

    As advances in very large scale integration (VLSI) technology lead to higher levels of circuit integration and new design styles and fabrication processes, traditional test generation techniques fail to adequately address the problems of how to (l) accurately represent the structure of design …

    vt Repository record for Hierarchical test generation for CMOS circuits (opens in a new tab)

  14. High-level synthesis and its application in the design of Reed-Solomon decoders

    … have been brought about by recent advanced in VLSI technology. High-level Synthesis (HLS) is a major part of VLSI design process. Its techniques can be used to yield an optimal result in the design. Yet, major applications of HLS methods are on digital filters or DSP circuits. Arithmetic in …

    concordia Repository record for High-level synthesis and its application in the design of Reed-Solomon decoders (opens in a new tab)

  15. A distributed design rule checker for VLSI layouts

    VLSI technology is continually fueling the need for more efficient computer aided design tools. Parallel or distributed processing is a possible solution to this problem. Advances in computer networking have made distributed processing over a local area network very attractive and cost-effective. …

    vt Repository record for A distributed design rule checker for VLSI layouts (opens in a new tab)

  16. Processor and link assignment using simulated annealing

    Advances in VLSI technology have made possible a new generation of multicomputer systems that contain hundreds or thousands of processors and offer a combined processing power far beyond that possible in a single processor machine. Multicomputers can be used to solve a variety of computationally …

    vt Repository record for Processor and link assignment using simulated annealing (opens in a new tab)

  17. Parallel pipelined VLSI arrays for real-time image processing

    … This research takes advantage of current VLSI technology to examine a new approach for processing arbitrary algorithms at real-time data rate. It is based on embedding the algorithms, expressed by their dependency graphs, into two dimensional regularly connected processing arrays. Each …

    vt Repository record for Parallel pipelined VLSI arrays for real-time image processing (opens in a new tab)

  18. Development of a monolithic very large scale optoelectronic integrated circuit technology

    … optoelectronic very large scale integration (OE-VLSI) technology is needed which closely couples large numbers of optoelectronic devices, such as light emitters and photodetectors, with complex electronics. This thesis has been concerned with the development of an optoelectronic integration …

    mit Repository record for Development of a monolithic very large scale optoelectronic integrated circuit technology (opens in a new tab)

  19. Accelerating the parsing process with an Application Specific VLSI RISC processor

    … implementation of a RISC processor in CMOS VLSI technology able to execute the designed instruction set. The feasibility of mapping the process of language recognition onto the instruction set of a RISC processor is investigated. This involves an assessment of the suitability of the LL(1) …

    cent-lancashire Repository record for Accelerating the parsing process with an Application Specific VLSI RISC processor (opens in a new tab)

  20. Development of a high-density, off-line, quasi-resonant converter using hybrid techniques

    The advancement of Very Large Scale Integration (VLSI) technology has reduced the size and increased the speed of information processing circuits. Consequently, power supplies for such circuits have had to meet increasing demands for power, yet simultaneously decrease in size. This need for higher …

    vt Repository record for Development of a high-density, off-line, quasi-resonant converter using hybrid techniques (opens in a new tab)

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