Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
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Showing 1 to 9 of 9 for “"VLSI CAD"”.
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Timing-driven optimization problems in VLSI CAD
… problems that arise in the design of VLSI circuits, with the satisfaction of timing constraints as the primary objective. We focus on problems where the underlying architecture is regular. Field Programmable Gate Arrays (FPGAs), identical standard cell based architectures and WSI …
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A class library approach to concurrent object-oriented programming with applications to VLSI CAD
… The interfaces are manifested in the ProperCAD II library, a C++ object library supporting actor concurrency on microprocessor-based parallel architectures and appropriate for applications exhibiting medium-grain parallelism. The interface supports uniprocessors, shared memory …
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A Convex Programming Approach to Problems in VLSI Design
Two problems in VLSI CAD, namely, those of transistor sizing and design centering, are dealt with in this thesis.
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A surface texture modeling system for solid freeform fabrication
… This system is structured to behave like a VLSI CAD system, which offers substantial process capabilities. The requirements for a Mechanical CAD, MCAD, system to behave like VLSI CAD are determined to be: 1. That the informational model of the unit cell of texture be separable into distinct …
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A framework for distributed Web-based microsystem design
… The Web can become an important platform for VLSI CAD, when the distributed object technologies (e.g, CORBA) are combined with the Web technologies (e.g., HTTP, CGI) and Web-aware object oriented languages (e.g., Java). In this thesis, a framework using the Object-Web technologies is …
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Task scheduling in high-level synthesis
… becomes increasingly important in the area of VLSI CAD. This thesis addresses scheduling and allocation in high-level synthesis. Specifically, we study the problem of register allocation in the presence of conditional blocks, such as if and case blocks and loops in the data flow graph. A …
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Improved Algorithms for Cell Placement and Their Parallel Implementations
As the size of modern VLSI circuits increases, new problems are emerging in the VLSI CAD area. The circuit is becoming more difficult to test, the circuit performances are greatly influenced by the physical layout, and the computation times taken by a lay-out CAD tool are becoming prohibitively …
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Timing Driven Analytical Placement for FPGA
… placement dominate the total runtime in the FPGA CAD flow. In this thesis, we propose a new fast and efficient timing driven analytical placement engine targeted at global placement for FPGAs followed by low temperature SA for detailed placement. Our global placement engine uses quadratic …