Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
Results
Showing 1 to 20 of 459 for “"VLSI"”.
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VLSI microdisplay technology
Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1994.
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Algorithms for VLSI Layout
… thesis considers several problems arising during VLSI layout and presents new techniques for solving them efficiently.
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Algorithms for VLSI routing
This thesis considers the problems arising from VLSI routing design. Algorithms are proposed for solving both global and local routing problems.
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Parallel processing for VLSI simulation
Simulation has become indispensable in the process of designing, verifying, and testing complex digital systems because it is flexible and cost-effective. As the complexity of the designs grows the time and memory requirements of simulation increase and simulation can become a bottleneck. At the …
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Silicon-photonics for VLSI systems
… chip-scale with a very large scale integrated (VLSI) CMOS electrical chip make them a promising alternative for next-generation processor I/O. The key device for VLSI photonics is the optical microring resonator, a compact micrometer-scale device enabling energy-efficient modulation, DWDM …
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An analog VLSI vocal tract
Increasingly, circuit models of biology are being used to improve performance in engineering systems. For example, silicon-cochlea-like models have led to improved speech recognition in noise and low-power cochlear-implant processors for the deaf. A promising approach to improve the naturalness of …
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VLSI microdisplays and optoelectronic technology
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1995.
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Opto-VLSI based WDM multifunction device
… this study, we develop a promising class of Opto-VLSI based devices, including a dynamic multi-function WDM processor, combining the functions of optical filter, channel equalizer and add-drop multiplexer, as well as a reconfigurable optical power splitter. We review the technological options for …
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Modern VLSI Placement Observing Technology Constraints
… processes on the Very Large Scale Integration (VLSI) design process. Any constraint not only makes the placement problem challenging; but also can degrade the quality of the objectives optimized during the placement process or other steps in the physical design flow. In addition, with increases …
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Temperature -Aware VLSI Design and Analysis
… effective framework for temperature-sensitive VLSI design and analysis. This work attempts to provide a comprehensive temperature- and reliability-conscious design solution for dealing with emerging thermal and reliability issues.
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Early Power Estimation for VLSI Circuits
Power estimation for register files at the microarchitectural level requires predictions of activity and capacitance of power hungry nodes in the register file. Both of these predictors are developed in this research, thus making it possible to estimate power for multiported, pipelined register …
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VLSI Architectures for Iterative Channel Decoders
Decoder architectures for LDPC codes introduce another complexity dimension related to the on-chip interconnect bottleneck of LDPC decoders. A new parameterized-core-based design methodology targeted for scalable and programmable LDPC decoders is proposed. The methodology solves the problems of …
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Reconfiguration of Fault-Tolerant VLSI Systems
Advances in VLSI (Very Large Scale Integration) allow increasingly larger and more complex systems to be fabricated on a single chip or wafer. As the number of elements in these systems increases, the problem of tolerating faulty elements becomes more and more important. This thesis addresses …
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An Expert System for VLSI Layout
… generation for the random logic modules in a VLSI chip. We propose a new top-down methodology that eliminates the weakness of a standard cell layout system. Our methodology decomposes the module layout problem into a smaller leaf-cell layout problem and designs the leaf-cells exactly according …
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Hierarchical Approaches to Vlsi Circuit Layout
This thesis studies two hierarchical approaches to the circuit layout problem: the top-down approach and the bottom-up approach.
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Fault covers in reconfigurable VLSI chips
Reconfigurable chips can be used to enhance the yield of chip production. These chips contain redundant elements that can be used to replace the defective elements. The fault covering problem is to assign the redundant elements to the defective elements such that the chip will function properly. We …
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Knowledge-based testing of VLSI circuits
… thesis addresses the problem of testing complex VLSI circuits. Traditional test generation used either low level gate descriptions or low level heuristics such as controllability and observability. In this thesis we have introduced a knowledge based approach to testing, which is based on (i) a …
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VLSI routing on the hexagonal grid
… the potential of the hexagonal grid for VLSI detailed routing. We have studied the layout geometry of the hexagonal grid and shown it to be compatible with standard VLSI implementation. This distinguishes the hexagonal routing models developed in this work as the first consistent …
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Functional models for MOS VLSI circuits
… typical Computer-Aided-Design applications for VLSI circuits is considered. A method for the automatic generation of functional models for switch- and gate-level circuits is presented. In addition, the use of these models is considered in four CAD applications: switch-level simulation, …
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VLSI design for freshmen and sophomores
Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1994.
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