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Showing 1 to 2 of 2 for “"VF-TLP"”.

  1. Charged device model electrostatic discharge protection and test methods for integrated circuits

    … including very-fast transmission line pulsing (VF-TLP) and capacitively coupled TLP (CC-TLP). This work presents three new wafer-level CDM testers. Two are modifications of existing CC-TLP and “WCDM” testers. The modified testers allow one to probe internal nodes during the stress event. The …

    uiuc Repository record for Charged device model electrostatic discharge protection and test methods for integrated circuits (opens in a new tab)

  2. ESD robustness of stacked NMOS transistors for high-voltage tolerant output drivers in FinFET technology

    Submission published under a 24 month embargo labeled 'U of I Access', the embargo will last until 2027-05-01

    uiuc Repository record for ESD robustness of stacked NMOS transistors for high-voltage tolerant output drivers in FinFET technology (opens in a new tab)