Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
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Showing 1 to 19 of 19 for “"Time-to-Digital Converter"”.
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Noise shaping techniques for analog and time to digital converters using voltage controlled oscillators
… offer very fast switching speed and high transistor density that can be utilized to implement analog signal processing functions in interesting and unconventional ways, for example by leveraging time as a signal domain. In this context, voltage controlled ring oscillators are circuit elements …
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Mixed signal compensation of sampling errors in ADCs due to noisy DPLL clock sources
This thesis clarifies a method to compensate for sampling errors in ADCs when a noisy digital phase locked-loop (DPLL). A time domain DPLL is built by MATLAB Simulink with a phase noise model. The phase noise is obtained from a measured oscillator. When DPLL achieve lock, the time-to-digital …
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DETECTING DELAY ANOMALIES INTRODUCED BY HARDWARE TROJANS USING CHIP AVERAGING AND AN ON-CHIP HIGH RESOLUTION EMBEDDED TEST STRUCTURE
… on-chip embedded test structure called a time-to-digital converter (TDC) that provides approx. 25 ps of timing resolution. A calibration method for the TDC as well as a chip-averaging technique are demonstrated to nearly eliminate chip-to-chip and within-die process variation effects on …
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Development and Characterisation of a Radiation Hard Readout Chip for the LHCb Outer Tracker Detector
… particle tracks in the Outer Tracker detector of the LHCb experiment requires to measure the drift times of the straw tubes. A Time to Digital Converter (TDC) chip has been developed for this task. The chip integrates into the LHCb data acquisition schema and fulfils the requirements of the …
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Measurement of second-order coherence in the microlaser
… for a microlaser in which the average number of atoms inside the cavity mode is larger than one. Two configurations of the microlaser are explored. In the standing-wave configuration, the atom-cavity coupling strength has a large variation depending on where an atom is injected in the cavity …
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Techniques for low jitter clock multiplication
… significantly reduced random jitter compared to typical Phase-Locked Loops (PLL). This is achieved by introducing the reference signal directly into their voltage controlled oscillators (VCO) to realign the phase to the clean reference. However, the typical cost of this benefit is a …
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Techniques for high-performance digital frequency synthesis and phase control
This thesis presents a 3.6-GHz, 500-kHz bandwidth digital [delta][sigma] frequency synthesizer architecture that leverages a recently invented noise-shaping time-to-digital converter (TDC) and an all-digital quantization noise cancellation technique to achieve excellent in-band and out-of-band …
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Integrated Signal Demodulation, Data Conversion, and Packaging Strategies for a Wireless, Fully Implantable, Bidirectional Neural Interface
… area within bioengineering has focused on restoring lost physiological function in humans. Among the various application domains, one of the most relevant is the development of upper-limb prostheses to replace missing limbs following amputation. Neural prosthetics represents a promising …
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Time-based circuits for communication systems in advanced CMOS technology
… size scales down, there have been challenges to design conventional analog circuits, such as low voltage headroom and the low intrinsic gain of a device. Although ever-decreasing device channel length in CMOS technology has mainly negative effects on analog circuits, it increases device speed …
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Light scattering: from ensembles to single particles
… of nanoscale systems with minimal perturbation to their dynamics. However, this advantage of optical techniques is partially offset by requiring complex inference procedures to accurately estimate physical quantities of interest from features extracted by the optical measurement. In this thesis, …
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Optical quantum random number generation: applications of single-photon event timing
… and computer engineering in nature, also aims to improve the performance of many systems in the field of quantum information. For example, random number generators are used in almost all areas of science, and the initial portion of this work details the theory, design, and characterization of …
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Design and implementation of high linearity FPGA-TDCs and an integrated large scale TCSPC system for time-resolved applications
The time-correlated single-photon counting (TCSPC) technology is a vital, advanced measurement and analytical tool for time-resolved biomedical, physics research and many industry areas because of its high temporal resolution and sensitivity. Analogue-based conventional TCSPC systems have been …
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Circuits for time-domain signal processing
… in CMOS technologies have brought benefits to both digital and analog integrated circuits. However, lower output impedance, and reduced supply voltage have also brought new challenges especially to the design of analog circuits that typically operate in voltage/current domains. In this …
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Data processing for 3D time of flight depth imaging
… number of ground based systems as a vital tool in the development of applications such as gaming, robotics and autonomous vehicles. As a result there is fast developing a requirement for large sensor arrays to provide high resolution 3D imaging. Due to the requirements of the next …
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RO-Based TDC Design with Configurable Resolution and Power for SPAD-Based TCSPC LiDAR Applications
Single-photon avalanche diodes (SPAD) are used to measure time-of-flight (ToF) using CMOS time-to-digital Converters (TDCs) for compact, low-cost, and highly integrated three-dimensional (3D) sensing. The TDC specifications are critical determinants of the system's range, resolution, and accuracy. …
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Digital enhancement techniques for fractional-N frequency synthesizers
… energy efficient operation of IoT nodes to extend battery life. Managing the data traffic generated by trillions of such nodes also puts severe energy constraints on the data centers. Clock generators that are essential elements in these systems consume significant power and therefore …
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Clock multiplication techniques for high-speed I/Os
… loops (PLLs) requires a large loop filter capacitor and power hungry oscillator. Digital PLLs can help reduce area but their jitter performance is severely degraded by quantization error. In this dissertation different clock multiplication techniques have been explored that can be suitable for …