Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
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Showing 1 to 20 of 21 for “"SystemC"”.
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Modeling and Synthesis with SystemC
… available today cannot meet this challenge. SystemC is a new modeling language based on C++. Models written in SystemC are executable and do not dictate either hardware or software implementation. The model written in SystemC can be synthesized to hardware using the CoCentric SystemC Compiler …
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Software Synthesis of SystemC Models
… software components for final implementation. SystemC is a system level modeling language useful for System On a Chip design. It provides various features to perform system level modeling and simulation, which are missing in the generic HDL's such as VHDL and Verilog. The hardware portion of …
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HEMLOCK: HEterogeneous ModeL Of Computation Kernel for SystemC
As SystemC gains popularity as a System Level Design Language (SLDL) for System-On-Chip (SOC) designs, heterogeneous modelling and efficient simulation become increasingly important. The key in making an SLDL heterogeneous is the facility to express different Models Of Computation (MOC). Currently, …
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Real-Time Operating System Modelling and Simulation Using SystemC
… time advance. This thesis is concerned with SystemC-based behavioural modelling and simulation of real-time embedded software, focusing upon RTOSs. The RTOS-centric simulation approach can support flexible, fast and accurate real-time software timing and functional simulation. They can help …
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Modeling and evaluation of multi-core multithreading processor architectures in SystemC
… The processor model is written in SystemC, which is a standard design and verification language that is built on C++ and that can be used to model hardware systems. The second contribution of this thesis is the development of an application model that seeks to characterize the …
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A polyhedral-based systemc modeling and generation framework for effective low-power design space exploration
… of the application, convert it to a SystemC (or equivalent) description of hardware implementing this application, and perform successive refinement of the description to improve various design metrics. In this thesis, we present an automated SystemC generation and design space …
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Ingredients for Successful System Level Automation & Design Methodology
… system level design (SLD) methodology based on SystemC more useful to the complex embedded system design community by presenting a number of ingredients currently absent in the existing SLD methodologies and frameworks. The complexity of embedded systems have been increasing at a rapid rate due …
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Parallel code-specific CPU simulation with dynamic phase convergence modeling for HW/SW co-design
While SystemC models provide a promising solution to the complex problem of HW/SW co-design within the system-on-chip paradigm, such requires a detailed annotation of transaction level energy and performance data within the model. While this data can be obtained through source code profiling of an …
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Translation of Heterogeneous High-level Models to Lower Level Design Languages
… sound methodology to translate Ptolemy models to SystemC models would have a very beneficial effect on the CAD/EDA industry. Ptolemy II is written in Java and its high-level designs, or abstract graph models, are represented as XML documents. Ptolemy's major emphasis is on the methodology for …
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Automated synthesis of mixed-technology MEMS systems with electronic control
… Languages (HDLs) such as VHDL, Verilog and SystemC have been supplemented with analogue and mixed-signal (AMS) extensions which are essential in analogue and mixed-technology design, development of corresponding analogue and mixed-technology synthesis methodologies is still lagging behind. …
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TLM para la verificación de integración en SoC
… breve introducción a TLM y su implementación en SystemC, el cuarto presenta la metodología propuesta para afrontar la problem atica. En el quinto capítulo se comenta cómo se realizó la implementación de la metodología. En el sexto capítulo se describen los resultados obtenidos. Mientras que el …
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Model based approach to Hardware/ Software Partitioning of SOC Designs
… new System Level Modeling Languages (SLML), like SystemC, has made this possible. This research proposes a strategy to automate the process of partitioning a system model after it has been simulated and verified. The partitioning idea is based on systems modeled using Process Model Graphs (PmG). …
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Accelerating Hardware Simulation on Multi-cores
… simulation frameworks for Verilog, VHDL and SystemC employ concurrency in the form of multi-threading to given an illusion of the inherent parallelism present in circuits. However, the discrete-event model of computation requires a global notion of an event-queue, which makes improving its …
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Dynamic partial self-reconfiguration: quick modeling, simulation, and synthesis
… können mittels einer C/C++ Bibliothek und SystemC simuliert werden. Eine Synthese auf RTL-Ebene ist beschrieben und in Teilen durch Umsetzung in ein Werkzeug namens „Fossy“ demonstriert. Die erzeugten Modelle stimmen zyklengenau in ihrem Zeitverhalten mit der OSSS+R-Beschreibung überein. …
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Trustworthy system development through high-level synthesis
… a simple 16-bit Central Processing Unit in the SystemC modeling language. We enhanced our processor with a simple security mechanism that enforces a memory integrity policy. The integrity policy allows a region of the program labeled as trustworthy to modify any address in data memory, but …
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3D-SoftChip: A novel 3D vertically integrated adaptive computing system [thesis]
… verification in the early design stage using SystemC.
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A Full System Co-Simulation Platform for Evaluating Edge Machine Learning Inference Using Compute-in-Memory
… this gap, we develop an integrated RISC-V QEMU-SystemC co-simulation environment that allows standard embedded Linux to interact with a transaction-level CIM accelerator model via memory-mapped I/O, direct memory access (DMA), and interrupts. To evaluate performance, we benchmark an MNIST image …
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A Multi-Language Goal-Tree Based Functional Test Planning System
… tool by testing models developed in VHDL and SystemC. We also present the design aspects of the Goal Tree System, which enable it to work across multiple platforms and with multiple simulators.
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Investigation into low power and reliable system-on-chip design
… of the thesis addresses the development of a SystemC fault injection simulator based on a novel fault injection technique. Using MPEG-2 decoder and other examples, it is shown that the simulator benefits from minimum design intrusion and high fault representation. The simulator is used …
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Functional Programming and Metamodeling frameworks for System Design
… we have worked with are SpecC, Ptolemy II, SystemC-H, etc. From our analysis of these, we identify their following shortcomings: First, their dependence on specific programming language artifacts (Java or C/C++) make them less amenable to formal analysis. Second, the refinement strategies …
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