Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
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Showing 1 to 20 of 35 for “"System-on-a-Chip"”.
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Low-Power CMOS Circuits for High-Performance Deep Submicron System on a Chip
… have several inherent advantages over conventional PLL-based clock multipliers. We propose a phase detector with reset circuitry and a new frequency multiplier to overcome the limited locking range and frequency multiplication problem of conventional DLL-based system.
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Charged device model electrostatic discharge failures in system on a chip and system in a package designs
… to investigate their ESD robustness. Two test chips were designed to aid the analysis. The specialized design choices that allow for distinguishing between multiple failure locations are thoroughly illustrated. The testing plan is detailed and the test chip measurement results are analyzed. The …
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Software Synthesis of SystemC Models
… the capability to integrate more and more functionality into a single chip. This is leading to a new design paradigm, System On a Chip (SOC). In SOC designs all the functionality of a system is put inside a single chip, leading to increased performance, reduced power consumption, lower costs, and …
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Design of a Low Power Delta Sigma Modulator for Analog to Digital Conversion
The growing demand of “System on a Chip” applications necessitates integration of multiple devices on the same chip. Analog to Digital conversion is essential to interfacing digital systems to external devices such as sensors. This presents a difficulty since high precision analog devices do not …
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Evaluating the Design and Performance of a Single-Chip Parallel Computer Using System-Level Models and Methodology
As single-chip systems are predicted to soon contain over a billion transistors, design methodologies are evolving dramatically to account for the fast evolution of technologies and product properties. Novel methodologies feature the exploration of design alternatives early in development, the …
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Parallel code-specific CPU simulation with dynamic phase convergence modeling for HW/SW co-design
While SystemC models provide a promising solution to the complex problem of HW/SW co-design within the system-on-chip paradigm, such requires a detailed annotation of transaction level energy and performance data within the model. While this data can be obtained through source code profiling of an …
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G.E.R.T : a go-based toolkit for embedded applications
Embedded systems are becoming increasingly complicated due to the emergence of SOCs (system-on-a-chip) with multiple cores, dizzying amounts of peripherals, and complicated virtual memory systems. Unfortunately, performant embedded systems for SOCs are still largely written in either bare-metal C …
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Twill: A Hybrid Microcontroller-FPGA Framework for Parallelizing Single- Threaded C Programs
<p>Increasingly System-On-A-Chip platforms which incorporate both micropro- cessors and re-programmable logic are being utilized across several fields ranging from the automotive industry to network infrastructure. Unfortunately, the de- velopment tools accompanying these products leave much to be …
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Semi-Automated Switching Regulator Modeling Method and Tool
… voltage regulators. These regulators are commonly used in many application areas including discrete use in larger systems, integrated in a System on a Chip (SoC), or as the primary use case for a design. When used in an integrated system these regulators can be a significant force in slowing …
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A low power controller for a MEMS based energy converter
… towards low power DSP and sensing applications creates an opportunity for the development of self-powered systems based on harvesting ambient energy. Several different ambient sources have already been exploited. With advances in microelectromechanical (MEMS) technology, it is possible to …
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Microcontroller (8051-core) instruction susceptibility to intentional electromagnetic interference (IEMI)
Intentional Electromagnetic Interference (IEMI) is a rising threat to the electronic systems that are used and depended upon in everyday life of civil society. To address this threat, it is important to develop an understanding of what IEMI is and how it can be used to disrupt sophisticated …
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Modeling and Synthesis with SystemC
With the increasing complexity of Application Specific Integrated Circuits (ASICs), System-On-a-Chip (SoC) design seems to be the current chip design paradigm. Unlike ASICs, SoCs are a potpourri of diverse components, including general-purpose or special-purpose processors. Designing and testing …
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Design for ESD Reliability in High-Frequency Mixed-Signal Integrated Circuits
The design of on-chip ESD protection has become increasingly critical and difficult because of shrinking device feature sizes, high operating speed, and system-on-a-chip (SoC) environment. A complex ESD protection network can be easily exposed during normal operation and can cause the degradation …
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Ultra-wideband digital baseband
… the use of Ultra-wideband signals for communication purposes in February 2002 in the band from 3.1GHz to 10.6GHz, effectively opening 7.5GHz of free unlicensed bandwidth. There are two main constraints for the use of this band: a maximum EIRP spectral density of -41.3dBm/MHz and a minimum …
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A high aspect-ratio silicon substrate-via technology and applications
… ICs to provide low impedance ground connections. As silicon RFICs strive for high-frequency operation, it becomes increasingly important to reduce all extrinsic parasitics. Of particular concern is the MOSFET source or BJT emitter impedance, which greatly affects the gain of RF …
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Compact Rake Boundary Layer Data System Module
… the design, assembly, programming, and evaluation of the BLDS-M-RAKE, the newest addition to the family of devices called the Boundary Layer Data System (BLDS). The BLDS-M-RAKE is a continuation of the BLDS-M series of devices, a modular approach with updated electronics for boundary layer …
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Design and Implementation of a Risc-V Based LoRa Module
The proliferation of the Internet of Things(IoT) in both scale and complexity, alongside advances in optimised edge and fog system architectures, is driving an increasing need for low power end nodes with greater computational capabilities. These distributed higher capacity nodes allow IoT …
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Predictive modeling of device and circuit reliability in highly scaled CMOS and SiGe BiCMOS technology
The advent of high-frequency silicon-based technologies has enabled the design of mixed-signal circuits that incorporate analog, RF, and digital circuit components to build cost-effective system-on-a-chip solutions. Emerging applications provide great incentive for continued scaling of transistor …
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Inference of Kolmogorov-Arnold Networks on FPGA-based SoC
… των περισσότερο διαδεδομένων Multi-Layer Perceptrons. Βασίζονται στην αναπαράσταση Kolmogorov-Arnold και δημιουργούν νευρωνικά δίκτυα με εκπαιδεύσιμες συναρτήσεις ενεργοποίησης ως βάρη. Παρότι συχνά παρουσιάζουν καλύτερα αποτέλεσματα από τα συμβατικά Multi-Layer Perceptrons παράγουν σχετικά …
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Synergistic development of an engineered biodegradable theranostic probe and lymph node organ-on-a-chip to study nanoparticle-lymphatic interactions
The lymphatic system plays a vital role in controlling immune response. Despite this, cancer often reshapes the lymphatic microenvironment and metastasizes into lymph nodes. Theranostic (therapeutic + diagnostic) nanoparticles have been used in a variety of applications, including the detection and …
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