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Showing 1 to 16 of 16 for “"System on a chip (SoC)"”.

  1. Semi-Automated Switching Regulator Modeling Method and Tool

    … voltage regulators. These regulators are commonly used in many application areas including discrete use in larger systems, integrated in a System on a Chip (SoC), or as the primary use case for a design. When used in an integrated system these regulators can be a significant force in slowing …

    arkansas Repository record for Semi-Automated Switching Regulator Modeling Method and Tool (opens in a new tab)

  2. Modeling and Synthesis with SystemC

    With the increasing complexity of Application Specific Integrated Circuits (ASICs), System-On-a-Chip (SoC) design seems to be the current chip design paradigm. Unlike ASICs, SoCs are a potpourri of diverse components, including general-purpose or special-purpose processors. Designing and testing …

    vt Repository record for Modeling and Synthesis with SystemC (opens in a new tab)

  3. Design for ESD Reliability in High-Frequency Mixed-Signal Integrated Circuits

    The design of on-chip ESD protection has become increasingly critical and difficult because of shrinking device feature sizes, high operating speed, and system-on-a-chip (SoC) environment. A complex ESD protection network can be easily exposed during normal operation and can cause the degradation …

    uiuc Repository record for Design for ESD Reliability in High-Frequency Mixed-Signal Integrated Circuits (opens in a new tab)

  4. Compact Rake Boundary Layer Data System Module

    … the design, assembly, programming, and evaluation of the BLDS-M-RAKE, the newest addition to the family of devices called the Boundary Layer Data System (BLDS). The BLDS-M-RAKE is a continuation of the BLDS-M series of devices, a modular approach with updated electronics for boundary layer …

    calpoly Repository record for Compact Rake Boundary Layer Data System Module (opens in a new tab)

  5. Design and Implementation of a Risc-V Based LoRa Module

    The proliferation of the Internet of Things(IoT) in both scale and complexity, alongside advances in optimised edge and fog system architectures, is driving an increasing need for low power end nodes with greater computational capabilities. These distributed higher capacity nodes allow IoT …

    cape-town Repository record for Design and Implementation of a Risc-V Based LoRa Module (opens in a new tab)

  6. Inference of Kolmogorov-Arnold Networks on FPGA-based SoC

    … των περισσότερο διαδεδομένων Multi-Layer Perceptrons. Βασίζονται στην αναπαράσταση Kolmogorov-Arnold και δημιουργούν νευρωνικά δίκτυα με εκπαιδεύσιμες συναρτήσεις ενεργοποίησης ως βάρη. Παρότι συχνά παρουσιάζουν καλύτερα αποτέλεσματα από τα συμβατικά Multi-Layer Perceptrons παράγουν σχετικά …

    athens Repository record for Inference of Kolmogorov-Arnold Networks on FPGA-based SoC (opens in a new tab)

  7. Software Synthesis of SystemC Models

    … the capability to integrate more and more functionality into a single chip. This is leading to a new design paradigm, System On a Chip (SOC). In SOC designs all the functionality of a system is put inside a single chip, leading to increased performance, reduced power consumption, lower costs, and …

    vt Repository record for Software Synthesis of SystemC Models (opens in a new tab)

  8. Integration and Evaluation of Cache Coherence Protocols for Multiprocessor SoCs

    System-on-a-chip (SoC) designs is characterized by heavy reuse of IP blocks to satisfy specific computing needs for target applications, reduce overall design cost, and expedite time-to-market. To meet their performance goal and cost constraint, SoC designers integrate multiple, sometimes …

    gatech Repository record for Integration and Evaluation of Cache Coherence Protocols for Multiprocessor SoCs (opens in a new tab)

  9. Formal Methods for Intellectual Property Composition Across Synchronization Domains

    A significant part of the System-on-a-Chip (SoC) design problem is in the correct composition of intellectual property (IP) blocks. Ever increasing clock frequencies make it impossible for signals to reach from one end of the chip to the other end within a clock cycle; this invalidates the …

    vt Repository record for Formal Methods for Intellectual Property Composition Across Synchronization Domains (opens in a new tab)

  10. Energy-efficient smart embedded memory design for IoT and AI

    Static Random Access Memory (SRAM) continues to be the embedded memory of choice for modern System-on-a-Chip (SoC) applications, thanks to aggressive CMOS scaling, which keeps on providing higher storage density per unit silicon area. As memory sizes continue to grow, increased bit-cell variation …

    mit Repository record for Energy-efficient smart embedded memory design for IoT and AI (opens in a new tab)

  11. Parallel code-specific CPU simulation with dynamic phase convergence modeling for HW/SW co-design

    While SystemC models provide a promising solution to the complex problem of HW/SW co-design within the system-on-chip paradigm, such requires a detailed annotation of transaction level energy and performance data within the model. While this data can be obtained through source code profiling of an …

    uiuc Repository record for Parallel code-specific CPU simulation with dynamic phase convergence modeling for HW/SW co-design (opens in a new tab)

  12. Globally-asynchronous, Locally-synchronous Wrapper Configurations For

    Globally-Asynchronous, Locally-Synchronous (GALS) design techniques employ the finer points of synchronous and asynchronous design methods to eliminate problems arising due to clock distribution, power dissipation, and large area over head. With the recent rise in the demand for System-on-a-Chip

    ucf

  13. Switched-Tank VCO Designs and Single Crystal Silicon Contour-Mode Disk Resonators for use in Multiband Radio Frequency Sources

    … large growth in wireless devices, such as personal data assistants (PDAs), wireless local area network (WLAN) enabled laptop computers, and intelligent transportation systems (ITS), the FCC allocated three high-frequency bands for unlicensed operation. Of particular interest is the 5-6 GHz …

    vt Repository record for Switched-Tank VCO Designs and Single Crystal Silicon Contour-Mode Disk Resonators for use in Multiband Radio Frequency Sources (opens in a new tab)

  14. Design and Characterization of RFIC Voltage Controlled Oscillators in Silicon Germanium HBT and Submicron MOS Technologies

    … for higher data rates and greater functionality. Wireless home and business networks and 3G and 4G cellular phone systems are promising technologies striving for market acceptance, requiring low-cost, low-power, and compact solutions. One approach to meet these demands is system-on-a-chip

    vt Repository record for Design and Characterization of RFIC Voltage Controlled Oscillators in Silicon Germanium HBT and Submicron MOS Technologies (opens in a new tab)

  15. Design And Characterization Of Noveldevices For New Generation Of Electrostaticdischarge (esd) Protection Structures

    The technology evolution and complexity of new circuit applications involve emerging reliability problems and even more sensitivity of integrated circuits (ICs) to electrostatic discharge (ESD)-induced damage. Regardless of the aggressive evolution in downscaling and subsequent improvement in …

    ucf

  16. SiGe BiCMOS RF ICs and Components for High Speed Wireless Data Networks

    The advent of high-fT silicon CMOS/BiCMOS technologies has led to a dramatic upsurge in the research and development of radio and microwave frequency integrated circuits (ICs) in silicon. The integration of silicon-germanium heterojunction bipolar transistors (SiGe HBTs) into established "digital" …

    vt Repository record for SiGe BiCMOS RF ICs and Components for High Speed Wireless Data Networks (opens in a new tab)