Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
Results
Showing 1 to 6 of 6 for “"Statistical Static Timing Analysis"”.
-
Computationally efficient characterization of standard cells for statistical static timing analysis
We propose a computationally efficient statistical static timing analysis (SSTA) technique that addresses intra-die variations at near-threshold to sub-threshold supply voltage, simulated on a scaled 32nm CMOS standard cell library. This technique would characterize the propagation delay and output …
-
Timing Analysis and Behavioral Synthesis with Process Variation
… submicron processes have ushered in a new era of statistical design, in which process parameters are no longer considered to be deterministic but are modeled as probability distributions. In order to support statistical design, new algorithms and methods are needed. One of the chief problems with …
-
High-Level Resource Binding and Allocation for Power and Performance Optimization
… the design hierarchy through its inclusion of a timing-driven floorplanner guided by a statistical static timing analysis engine which is used to modify and enhance the synthesis solution. FastYield is able to incorporate spatial correlations of process variations in its optimization, which are …
-
Evaluating the effect of process variation on silicon and graphene nano-ribbon based circuits
Item withdrawn by Mark Zulauf (zulauf@illinois.edu) on 2012-04-21T15:49:15Z Item was in collections: University of Illinois Theses & Dissertations (ID: 1) No. of bitstreams: 2 Rogachev_Artem.docx: 719809 bytes, checksum: a5e99a79e062ca8794a0646df6052ac8 (MD5) Rogachev_Artem.pdf: 1216501 bytes, …
-
Architecture and CAD for nanoscale and 3d FPGA
… aware physical design tools are used, with statistical static timing analysis (SSTA) that can handle both Gaussian and non-Gaussian random variables. A 2.75× performance improvement is seen over an equivalent CMOS FPGA at a 95% yield. In addition, FPCNA offers a 5× footprint reduction …
-
Architecture and CAD for carbon nanomaterial integrated circuits
… physical design tools are used, with statistical timing analysis that can handle both Gaussian and non-Gaussian random variables. When the FPCNA architecture is evaluated using this CAD flow, a 2.75× performance improvement is seen over an equivalent CMOS FPGA at a 95% yield. In …