Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
Results
Showing 1 to 13 of 13 for “"Static Random Access Memory (SRAM)"”.
-
Design of a universal test platform for radiation testing of digital components
… board will be used to test two custom static random access memory (SRAM) chips, as well as other custom chips designed at the Naval Postgraduate School. Components for the test hardware were selected to allow prototyping with standard parts that can later be replaced with radiation …
-
Efficient CNNs and Energy Efficient SRAM Design for ubiquitous medical devices
… volume estimates and (2) energy efficient static random access memory (SRAM) with in-memory dot-product computation for low-power segmentation network implementation. The aim is to develop platform technology embodiments deployable across a wide range of health-monitoring wearable device …
-
Efficient large flow detection over arbitrary windows: an exact algorithm outside an ambiguity region
… such that we can fit the storage into on-chip Static Random-Access Memory (SRAM) to achieve line-speed detection. To evaluate EARDet, we not only theoretically proved properties of EARDet above, but also evaluated them with real traffic, and the result perfectly supports our analysis.
-
Energy efficient reconfigurable SRAM using data-dependency
… Circuit (IC) systems, a novel reconfigurable memory framework is proposed in this thesis which builds upon traditional low power techniques such as voltage scaling in order to achieve up to 31% power savings for targeted applications. The general strategy underlying the presented low power …
-
Energy-efficient smart embedded memory design for IoT and AI
Static Random Access Memory (SRAM) continues to be the embedded memory of choice for modern System-on-a-Chip (SoC) applications, thanks to aggressive CMOS scaling, which keeps on providing higher storage density per unit silicon area. As memory sizes continue to grow, increased bit-cell variation …
-
Designing High-Performance Microprocessors in 3-Dimensional Integration Technology
… our attention on three basic circuit classes: static random access memory (SRAM) circuits, associative/CAM logic circuits, and data processing in conventional high-performance processors. We propose 2-die-stacked and 4-die-stacked 3D-integrated circuits to deal with the constraints of the …
-
Circuit design for embedded memory in low-power integrated circuits
… explores the challenges for integrating embedded static random access memory (SRAM) and non-volatile memory-based on ferroelectric capacitor technology-into lowpower integrated circuits. First considered is the impact of process variation in deep-submicron technologies on SRAM, which must exhibit …
-
Memory Module Design for High-Temperature Applications in SiC CMOS Technology
… and digital circuits designed in SiC. However, a memory module is required to realize a complete electronic system in SiC that bridges the gap between data processing and data storage. Designing memory that can process massive amounts of data in harsh environments while consuming low power opens …
-
TiN/HfO2/SiO2/Si gate stacks reliability : Contribution of HfO2 and interfacial SiO2 layer
… was not required. Since the failure process in static random access memory (SRAM) is typically predicted by the realistic TDDB model based on gate leakage current (IFAIL) rather than the conventional first breakdown criterion, the relevant failure distributions at IFAIL are non-Weibull including …
-
Optimization of Physical Unclonable Function Protocols for Lightweight Processing
… techniques to improve the reliability of SRAM PUFs. The results indicate an increase in min-entropy without much effect on the error rate but at the expense of PUF size.
-
Static random-access memory designs based on different FinFET at lower technology node (7nm)
The Static Random-Access Memory (SRAM) has a significant performance impact on current nanoelectronics systems. To improve SRAM efficiency, it is important to utilize emerging technologies to overcome short-channel effects (SCE) of conventional CMOS. FinFET devices are promising emerging devices …
-
Refrint: intelligent refresh to minimize power in on-chip multiprocessor cache hierarchies
… use dynamic energy ever more efficiently, static power consumption becomes a major concern. In particular, in a large manycore running at a low voltage, leakage in on-chip memory modules contributes substantially to the chip’s power draw. This is unfortunate given that, intuitively, the …
-
Novel many-core architectures for energy-efficiency
… if the chip area is fixed - stays constant. Static power density, on the other hand, increases. In early generations, however, since the share of static power was practically negligible, dynamic power density staying constant translated to total power density staying constant. This picture …