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Showing 1 to 2 of 2 for “"Skew Effect"”.

  1. SHA-less pipeline ADC design with sampling clock skew calibration

    … in a SHA-less architecture the sampling clock skew between the sub-ADC and the multiplying digital-to-analog converter (MDAC) in the pipeline first stage results in gross conversion errors at high input frequencies. This skew effect is aggravated in a SHA-less multi-bit-per-stage pipeline …

    uiuc Repository record for SHA-less pipeline ADC design with sampling clock skew calibration (opens in a new tab)

  2. Evaluation of superstructure response and load distribution in skewed steel I-girder bridges

    Submission original under an indefinite embargo labeled 'Open Access'. The submission was exported from vireo on 2023-12-04 without embargo terms

    uiuc Repository record for Evaluation of superstructure response and load distribution in skewed steel I-girder bridges (opens in a new tab)