Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
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Showing 1 to 16 of 16 for “"Single Event Upsets"”.
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Characterizing Single Event Upsets within the lpGBT-based End-of-Substructure Card
… in an erroneous change in logic known as a Single Event Upset (SEU). The lpGBT is a radiation tolerant ASIC and employs digital signal processing (DSP) and triple modular redundancy (TMR) techniques to mitigate against the effects of SEUs on transmitted data. This thesis presents an …
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Single event upset hardened CMOS combinational logic and clock buffer design
… logic level causing failure. Soft errors or Single Event Upsets (SEU) caused by radiation strikes are one of the main failure modes in a VLSI circuit. Previous work predicts that soft error rate may dominate the failure rate in VLSI circuit compared to all other failure modes put together. …
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A gate-level simulator for alpha-particle-induced transient faults
… evaluate the effects of alpha-particle hits or single event upsets (SEUs) in CMOS standard cell based synchronous sequential VLSI circuits. The speed comes from approximating the initial analog effects with gate level models, as well as using an improved transient fault simulation algorithm in a …
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Circuit designs for low-power and SEU-hardened systems
… has become a growing concern. As a result Single Event Upsets (SEUs) have become a major challenge to robust designs. Single event upset is a temporary change in the state of a device due to a particle strike (usually from the radiation belts or from cosmic rays) which may manifest as an …
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Radiation-Hardened Delay-Insensitive Asynchronous Circuits for Multi-Bit SEU Mitigation and Data-Retaining SEL Protection
… to mitigate the effects of up to two single-event upsets (SEU) and a single-event latch-up (SEL). The multi-bit SEU mitigation with SEL protection architecture improves the original design by providing more integrity against data corruption and lock-ups caused by multi-bit SEUs, and it …
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Concurrent detection of transient faults in microprocessors
… that experience transient faults due to single event upsets. These upsets cause a temporary change in the state of the system without any permanent damage. Because of their random and non-recurring nature, transient faults are difficult to detect and isolate, hence they become a source of …
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Estimating the Dynamic Sensitive Cross Section of an FPGA Design through Fault injection
… fault injection tool has been created to emulate single event upset (SEU) behavior within the configuration memory of an FPGA. This tool is able to rapidly and accurately determine the dynamic sensitive cross section of the configuration memory for a given FPGA design. This tool enables the …
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Susceptibility evaluation of combinational logic in VLSI circuits
… These transient faults are referred to as Single Event Upsets (SEUs). Because of their random and non-recurring nature, such faults are very difficult to detect and hence are of source of great concern. This thesis examines the logical response of combinational logic circuits to SEUs. Time …
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Building the Future: HL-LHC ATLAS Upgrades and Event-Topology-Based Principles to Search for New Physics with Missing Transverse Momentum
… is projected to experience zero uncorrected single event upsets. An upper limit of $3.25\times10^{-5}$ single event burnouts per $fb^{-1}$ is placed for GaN FETs operated in the off-state in the forward detector region. In terms of expanding the search for new physics, novel …
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Robust hardware elements for weightless artificial neural networks
… making them less susceptible to transient single event upsets. They employ Boolean, weightless binary, asynchronous elements throughout thus increasing robustness in the presence of impulsive noise. Hierarchies formed from these neural elements are studied and a weightless probabilisitic …
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Data management of geostationary communication satellite telemetry and correlation to space weather observations
… power amplifier (SSPA) anomalies and 226 single event upsets (SEUs). We first compare SSPA anomalies to the solar and geomagnetic cycle. We find most SSPA anomalies occur as solar activity declines, and when geomagnetic activity is low. We compare GOES 2 MeV electron flux and SSPA current …
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Probability of latching single event upset errors in VLSI circuits
… reasons. First, transient faults, also known as Single Event Upsets (SEU), were first observed in memory circuits located on board satellites. Second, an SEU can leave a lasting effect on a circuit if it occurs in a flip-flop, and third, SEUs can cause the output of a flip-flop to change state …
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Sensitivity of Feedforward Neural Networks to Harsh Computing Environments
… networks under memory errors, specifically single event upset style errors where single bits flip in a network's trained parameters. The main goal of these experiments is to determine if different neural network architectures are more robust than others. Initial experiments show that MLPs …
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Built-in controller for self-test and repair of 3D integrated Nand flash memory chip, used in radiation intense space environment
… to space, avionics, and defense. Even if a single memory domain fails in a stack of memory modules due to any kind of irregularity, it can lead to a total system breakdown. The potential dangers for 3D memory include destructive errors such as physical errors in memory arrays, wear out …
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Investigating the Optical Link Performance of the End-of Substructure Card and Susceptibility to SEUs
… erroneous changes in device logic, known as Single Event Upsets (SEU). The SEU susceptibility of the EoS card, with a focus on the Versatile Link Plus Transceiver (VTRx+) component, is studied by irradiating the EoS card with a neutron source with a distributed energy spectrum and a peak …
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Study of Radiation Effects on FPGA and GPU based Neural Networks Accelerator Designs
… heavy ions, can penetrate the device and cause single-event effects (SEEs), resulting in transient voltage or current changes in the circuitry. These changes can cause data to be modified, generate errors in logic, or even cause system crashes. Various radiation-resistant techniques have been …