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Showing 1 to 7 of 7 for “"Silicon-on-insulator technology."”.

  1. Modeling, Simulation and Design of EOS/ESD Protection Devices and Circuits in Silicon-on-Insulator Technology

    For the first time, a circuit level simulation tool for CMOS-on-SOI ESD protection networks is presented. The simulator, SOI-iETSIM, has built-in device models for completely coupled electrothermal simulation of SOI protection devices operating in the high current regime. The implementation of …

    uiuc Repository record for Modeling, Simulation and Design of EOS/ESD Protection Devices and Circuits in Silicon-on-Insulator Technology (opens in a new tab)

  2. A high-speed, low-power analog-to-digital converter in fully depleted silicon-on-insulator technology

    This thesis demonstrates a one-volt, high-speed, ultra-low-power, six-bit flash analog-to-digital converter fabricated in a fully depleted silicon-on-insulator CMOS technology. Silicon-on-insulator CMOS technology provides a number of benefits for low-power low-voltage analog design. The full …

    mit Repository record for A high-speed, low-power analog-to-digital converter in fully depleted silicon-on-insulator technology (opens in a new tab)

  3. Development of Nanoelectromechanical Resonators for RFIC Applications

    Over the past decade there has been an explosion in the demand for wireless mobile personal communications systems (PCS), a trend that shows no signs of slowing down in the foreseeable future. This demand has created a greater need for low-cost, low-power, compact system solutions. As a result, …

    vt Repository record for Development of Nanoelectromechanical Resonators for RFIC Applications (opens in a new tab)

  4. Characterizing within-die and die-to-die delay variations introduced By process variations and SOI history effect

    Variations in delay caused by within-die and die-to-die process variations and SOI history effect increase timing margins and reduce performance. In order to develop mitigation techniques to reduce the detrimental effects of delay variations, particularly those that occur within-die, new methods of …

    unm Repository record for Characterizing within-die and die-to-die delay variations introduced By process variations and SOI history effect (opens in a new tab)

  5. Nonlinear Applications using Silicon Nanophotonic Wires

    This thesis is concerned with an emerging set of nonlinear-optical applications using silicon nanophotonic "wires" fabricated on a silicon-on-insulator photonic chip. These deeply scaled silicon nanophotonic wires are capable of confining the telecom and mid-infrared (mid-IR) light tightly into an …

    columbia-diss Repository record for Nonlinear Applications using Silicon Nanophotonic Wires (opens in a new tab)

  6. Accuracy, Precision, and Resolution in Strain Measurements on Diffraction Instruments

    Diffraction stress analysis is a commonly used technique to evaluate the properties and performance of different classes of materials from engineering materials, such as steels and alloys, to electronic materials like Silicon chips. Often to better understand the performance of these materials at …

    columbia-diss Repository record for Accuracy, Precision, and Resolution in Strain Measurements on Diffraction Instruments (opens in a new tab)

  7. Novel materials and optical waveguide systems for silicon photonics

    … in these three years has been mainly focused on the characterization of structural and optical properties of three kinds of Si-based materials and devices. The first one is the study of SiOC thin films, carried within the TMR-POLYCERNET project financed by the European community. The …

    trento Repository record for Novel materials and optical waveguide systems for silicon photonics (opens in a new tab)