Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
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Showing 1 to 20 of 111 for “"Silicon-on-insulator"”.
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Extreme-submicrometer silicon-on-insulator (SOI) MOSFETs
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1994.
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Fabrication of ultra-thin strained silicon on insulator
Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2003.
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Crystallization in self-implanted polycrystalline silicon-on-insulator films
Bibliography: leaves 118-122.
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Novel polarization-diversity devices on a silicon-on-insulator platform.
Silicon photonics built on a silicon-on-insulator (SOI) platform has received much attention in recent years due to its compatibility with complementary metal-oxide-semiconductor (CMOS) technology, which makes the mass production of photonics devices cost-effective. The intrinsic high-index …
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Mechanisms of layer-transfer related to silicon-on-insulator structures
The objective of this dissertation was to study the mechanisms that affect an efficient hydrogenation process in silicon and to validate a hypothesis concerning the hydrogenation mechanism of pre-implanted silicon wafers under hydrogen-plasma processing. These studies are related to a general …
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Characterization and modeling of silicon-on-insulator field effect transistors
Thesis (M.Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1999.
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Anisotropic dewetting in ultra-thin single-crystal silicon-on-insulator films
The single crystal silicon-on-insulator thin film materials system represents both an ideal model system for the study of anisotropic thin film dewetting as well as a technologically important system for the development of the next generation of MOSFET devices. The scientific community has …
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Design, process, and reliability considerations in silicon-on-insulator (SOI) MOSFETs
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1998.
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Formulation of electrophoretic module for integration onto silicon-on-insulator neural probes
… in neurochemistry, due to its high separation efficiency and ability to analyze complex mixtures at a small scale [1]. However, challenges remain when it comes to scaling CE systems to match the demands of specific applications, particularly in situations where sample volume is constrained, …
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A surface-potential-based compact model for partially-depleted silicon-on-insulator MOSFETs
With the continuous scaling of CMOS technologies, Silicon-on-Insulator (SOI) technologies have become more competitive compared to bulk, due to their lower parasitic capacitances and leakage currents. The shift towards high frequency, low power circuitry, coupled with the increased maturity of SOI …
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One-dimensional photonic crystal / photonic wire cavities based on silicon-on-insulator (SOI)
… optical processing for many telecommunications applications, as well as other applications of high performance optoelectronics. The combination of one-dimensional photonic crystal structures (PhC) and narrow photonic wire (PhW) waveguides in high refractive-index contrast materials such as …
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Operation of silicon-germanium heterojunction bipolar transistors on silicon-on-insulator in extreme environments
Recently, several SiGe HBT devices fabricated on CMOS-compatible silicon on insulator (SOI) substrates (SiGe HBTs-on-SOI) have been demonstrated, combining the well-known SiGe HBT performance with the advantages of SOI substrates. These new devices are especially interesting in the context of …
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Correlation of the microstructure and processing conditions of ultra-thin oxygen-implanted silicon-on-insulator materials
The effect of implantation dose and annealing conditions on the microstructure of ultra-thin SIMOX materials formed by 65 keV ion implantation were investigated using transmission electron microscopy (TEM), scanning electron microscopy (SEM), Auger electron spectroscopy (AES), Rutherford …
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Modeling, Simulation and Design of EOS/ESD Protection Devices and Circuits in Silicon-on-Insulator Technology
For the first time, a circuit level simulation tool for CMOS-on-SOI ESD protection networks is presented. The simulator, SOI-iETSIM, has built-in device models for completely coupled electrothermal simulation of SOI protection devices operating in the high current regime. The implementation of …
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A high-speed, low-power analog-to-digital converter in fully depleted silicon-on-insulator technology
This thesis demonstrates a one-volt, high-speed, ultra-low-power, six-bit flash analog-to-digital converter fabricated in a fully depleted silicon-on-insulator CMOS technology. Silicon-on-insulator CMOS technology provides a number of benefits for low-power low-voltage analog design. The full …
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Correlation of silicon microroughness with electrical parameters of SOI-AS (silicon-on-insulator with active substrate)
Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1998.
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Compact Trench-Based Silicon-on-Insulator Rib Waveguide 90-Degree and 105-Degree Bend and Splitter Design
… presents a theoretical and numerical investigation of silicon-on-insulator trench based passive optical components, bend and splitter, respectively. Compact 90 degree and 105 degree bend and splitter are designed with high index-contrast rib waveguide at wavelength 1550nm and serve as building …
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Study of silicon-on-insulator multiple-gate MOS structures including band-gap engineering and self heating effects
The progresses of electron devices integration have proceeded for more than 40 years following the well–known Moore’s law, which states that the transistors density on chip doubles every 24 months. This trend has been possible due to the downsizing of the MOSFET dimensions (scaling); however, new …
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Fabrication, simulation et caractérisation des propriétés de transport de composants à effet de champ latéral sur substrat de soi (Silicon-on-insulator)
À la base de l’évolution de la technologie microélectronique actuelle, la réduction des dimensions critiques des MOSFET standards pour améliorer leurs performances électriques a atteint depuis quelques années ses limites physiques. L’utilisation de nanocomposants innovateurs ayant une configuration …
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