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Showing 1 to 1 of 1 for “"Shared memory combined input crosspoint buffered packet switch"”.
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Architecture design and performance analysis of practical buffered-crossbar packet switches
Combined input crosspoint buffered (CICB) packet switches were introduced to relax inputoutput arbitration timing and provide high throughput under admissible traffic. However, the amount of memory required in the crossbar of an N x N switch is N^2x k x L, where k is the crosspoint buffer size and …