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Showing 1 to 5 of 5 for “"Secure processor"”.

  1. AEGIS : a single-chip secure processor

    … exist in distributed environments. The AEGIS secure processor enables a physically secure computing platform to be built with a main processor as the only trusted hardware component. AEGIS empowers a remote party to authenticate the platform and guarantees secure execution even under physical …

    mit Repository record for AEGIS : a single-chip secure processor (opens in a new tab)

  2. Development of a programming model for the AEGIS secure processor

    … a high level programming model for the AEGIS secure processor is designed and implemented. The AEGIS processor enables developers to create trusted systems, while only needing to trust the AEGIS processor. In order for developers to utilize the processor, there was a need for high level access …

    mit Repository record for Development of a programming model for the AEGIS secure processor (opens in a new tab)

  3. Architectural Support for Protecting Memory Integrity and Confidentiality

    … describes efficient design of tamper-resistant secure processor and cryptographic memory protection model that will strength security of a computing system. The thesis proposes certain cryptographic and security features integrated into the general purpose processor and computing platform to …

    gatech Repository record for Architectural Support for Protecting Memory Integrity and Confidentiality (opens in a new tab)

  4. Ascend : an architecture for performing secure computation on encrypted data

    … FHE's current overheads limit its applicability. Secure processors (e.g., Aegis), coprocessors (e.g., TPM) or hardware extensions (e.g., TXT) typically require trust in the entire processor, the host operating system and the program that computes on the inputs. In this thesis, we design a secure

    mit Repository record for Ascend : an architecture for performing secure computation on encrypted data (opens in a new tab)

  5. Oblivious RAM : from theory to practice

    … as the on-chip memory controller for a 25 core processor. This proves the viability of a single-chip secure processor that can prevent software IP or data theft through a program's access pattern to main memory (having applications to computation outsourcing and IoT). From a technical …

    mit Repository record for Oblivious RAM : from theory to practice (opens in a new tab)