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Showing 1 to 7 of 7 for “"Runtime Reconfiguration"”.
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Design and Implementation of the FINS Framework: Flexible Internetwork Stack
… that allows cross-layer behavior and runtime reconfiguration of the protocol stack. Version 1.0 of the framework makes use of existing physical and data link layer functionality, while enabling modifications to the stack at the network layer and above, or even the implementation of a …
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VLSI Implementation of a Wormhole Runtime Reconfigurable Processor
… innovations. Among these, the wormhole runtime reconfigurable architecture introduces the concept of stream processing. It enables dynamic reconfiguration of hardware with little overheads and is very much suited for data-path based computations with deep computational pipelines. …
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The Effects of Caching on Reconfigurable Adaptive Computing Systems
… are available. One solution to this problem is runtime reconfiguration (RTR). Using RTR techniques, a large algorithm is implemented as a collection of configurations for the reconfigurable hardware. These configurations are loaded onto the reconfigurable hardware as necessary to implement the …
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Design and Implementation of an FPGA-based Partially Reconfigurable Network Controller
… of FPGAs that cannot be integrated into ASICs is runtime reconfiguration in which, certain portions of the chip are reconfigured at runtime while the other parts continue to operate normally. This feature is required for network controllers with multiple data transfer channels that need to …
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A Safety-Performance Framework for Computational Awareness in Autonomous Robots
… timely and correct behavior while allowing for runtime reconfiguration of scheduling parameters. To attain computational awareness in autonomous robots, we conduct a data-driven study of these computational tasks from the resource management perspective, profiling and analyzing their timing, …
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Dynamic partial self-reconfiguration: quick modeling, simulation, and synthesis
In dieser Arbeit wird mit OSSS+R ein Ansatz zur Vereinfachung des Entwurfs dynamisch partiell rekonfigurierbarer Systeme mit FPGAs vorgesellt. Die Modellierung erfolgt objektorientiert und nutzt sowohl polymorphe Elemente als auch das Konzept virtueller Hardware. Hierbei liegt der Fokus auf …
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FSSD-DPR: FPGA-based emulation framework for solid-state drives with dynamic parameter-based reconfiguration
Submission original under an indefinite embargo labeled 'Open Access'. The submission was exported from vireo on 2023-09-01 without embargo terms