Global ETD Search

Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.

Results

Showing 1 to 7 of 7 for “"Pre-silicon"”.

  1. Coverage analysis for assertions and emulation based verification

    Coverage analysis is critical in pre-silicon verification of hardware designs for assessing the completeness of verification and identifying inadequately exercised areas of the design. It is widely integrated in the simulation based verification flow in the hardware industry. In this thesis, we …

    uiuc Repository record for Coverage analysis for assertions and emulation based verification (opens in a new tab)

  2. Novel Architectures for Trace Buffer Design to facilitate Post-Silicon Validation and Test

    Post-Silicon validation is playing an increasingly important role as more chips are failing in the functional mode due to either manufacturing defects escaped during scan-based tests or design bugs missed during pre-silicon validation. Critical to the diagnosis engineer is the ability to observe as …

    vt Repository record for Novel Architectures for Trace Buffer Design to facilitate Post-Silicon Validation and Test (opens in a new tab)

  3. High quality functional coverage based trace signal selection for post-silicon validation

    … always impossible to capture all bugs during the pre-silicon verification phase; therefore, a small number of bugs escape after a chip is manufactured. Once a chip is manufactured, it is considered as a black box since internal observability is lost. To increase observability for post-silicon

    uiuc Repository record for High quality functional coverage based trace signal selection for post-silicon validation (opens in a new tab)

  4. System-level trace signal selection for post-silicon debug using linear programming

    … using NoC (network- on-chip) communication, post-silicon validation has become and arduous task that consumes much of the development time of the product. The process of finding the root cause of bugs found in post-silicon validation has proven to be much more difficult than in pre-silicon because …

    uiuc Repository record for System-level trace signal selection for post-silicon debug using linear programming (opens in a new tab)

  5. Robust and reliable hardware accelerator design through high-level synthesis

    … key stages in the hardware design and use cycle: pre-silicon debugging, post-silicon validation, and post-deployment error detection. Our solution for rapid pre-silicon debugging of accelerator designs is hybrid tracing: comparing a datapath-level trace of hardware execution with a reference …

    uiuc Repository record for Robust and reliable hardware accelerator design through high-level synthesis (opens in a new tab)

  6. Scalable functional validation of next generation SoCs

    … autonomous vehicles, health care systems. The presence of any undetected bugs in these systems would have aberrant cost both in terms of safety and reliability and can cause loss of property or life. Hence, SoC validation is a crucial task to ensure the functional correctness of an SoC. The …

    uiuc Repository record for Scalable functional validation of next generation SoCs (opens in a new tab)

  7. Towards Comprehensive Side-channel Resistant Embedded Systems

    … components makes it very difficult to comprehensively capture every side-channel vulnerability, locate the root cause of the side-channel leakage, and efficiently fix the vulnerabilities. In this dissertation, we developed methodologies that can help designers detect and fix side-channel …

    vt Repository record for Towards Comprehensive Side-channel Resistant Embedded Systems (opens in a new tab)