Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
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Showing 1 to 20 of 74 for “"Pipelining"”.
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K-hot pipelining
… current techniques are needed. We propose k-hot pipelining, a novel technique to support multiple power-performance points in a processor. The key idea is to provide power and clock to only k stages of an m-stage pipeline (k < m); the k stages to be powered on change as instructions flow through …
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Optimal power/performance pipelining for error resilient processors
… are significant energy efficiency benefits to pipelining an architecture for an error resiliency mechanism versus error resiliency-agnostic pipelining. As another example, we show that benefits from error resiliency are greater for short pipelines than long pipelines. We also confirm that the …
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Efficient pipelining of nested loops : unroll-and-squash
… for mapping nested loops into hardware and pipelining them efficiently. The technique achieves fine-grain parallelism even on strong intra- and inter-iteration data-dependent inner loops and, by economically sharing resources, improves performance at the expense of a small amount of …
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Least-Squares Approximation and Polyphase Decomposition for Pipelining Recursive filters
Current techniques used in pipelining recursive filters require high hardware complexity. These techniques attempt to preserve the exact frequency response of the original circuit while seeking to construct a pipelined architecture. We present a technique that relaxes the need to preserve the exact …
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Spatial software pipelining on distributed architectures for sparse matrix codes
… addressed. This thesis presents spatial software pipelining, a new mechanism for doing data layout and instruction placement for loops. Spatial software pipelining places instructions and memory to avoid communication cycles, decreases the dependencies of tiles on each other, allows the bodies of …
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Pipelining: Problematizing the Social Constructionism of Disability in Supported Employment
People who are disabled encounter income inequity and employment discrimination. The intersection of disability-based inequity and employment discrimination has increasingly been called the Disability and Employment Conundrum (DEC). Within the last 20 years, the Individual Placement and Support …
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Multiple-Pass Pipelining: Enhancing in-Order Microarchitectures to Out-of-Order Performance
"With two-pass pipelining, programs execute on two in-order back-end pipelines coupled by a queue. The ""advance"" pipeline often defers instructions dispatching with unready operands rather than stalling. The ""backup"" pipeline allows concurrent resolution of instructions deferred by the first …
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High Speed Circuit Design Based on a Hybrid of Conventional and Wave Pipelining
… technique to attain those goals is synchronous pipelining, which increases the throughput of a circuit at the expense of longer latency, and it is therefore suitable where throughput takes priority over latency. Two synchronous pipelining approaches, conventional pipelining and wave pipelining, …
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Directive-Based Data Partitioning and Pipelining and Auto-Tuning for High-Performance GPU Computing
… aims to provide efficient directive-based data pipelining approaches for GPUs that tackle these issues and improve performance, programmability, and memory management.
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Pipelining Of Double Precision Floating Point Division And Square Root Operations On Field-programmable Gate Arrays
… consumption as a function of pipeline depth. Pipelining experiments reveal that the area overhead tends to remain constant regardless of the degree of pipelining to which the design is submitted, while the throughput increases with pipeline depth. In addition, these experiments reveal that …
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Minimization Of Power Dissipation In Digital Circuits Using Pipelining And A Study Of Clock Gating Technique
… and amount of power dissipation. The concept of pipelining is explained and the reduction in the power dissipation of the multipliers after pipelining is experimentally determined. Clock gating is a very important technique used in the design of digital circuits to reduce power dissipation. …
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Effiziente Implementierung eingebetteter Runge-Kutta-Verfahren durch Ausnutzung der Speicherzugriffslokalität
… zu verbessern. Es wird ein blockbasierter Pipelining-Algorithmus vorgestellt, der unter der Voraussetzung, daß die rechte Seite eine beschränkte Zugriffsdistanz besitzt, bei der Integration von Differentialgleichungssystemen mit großer Dimension ein besseres Lokalitätsverhalten als die …
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High-Speed, Low-Spurious CMOS Analog -to -Digital Converter
Pipelining not only provides a speed advantage, but also enables the application of background offset trimming to folding ADCs. Background offset trimming with a delta-sigma modulator is applied to compensate the random input offset of folding amplifiers. A subranging front-end is used in …
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Program Partitioning and Synchronization on Multiprocessor Systems (Parallel, Computer Architecture, Compiler)
… limitations, faster circuits and more levels of pipelining of vector processors can no longer satisfy the increasing demand for high-speed computation. Multiprocessing problems in parallel is a natural trend. Five essential issues are identified in solving problems on multiprocessor systems: …
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Data preload for superscalar and VLIW processors
Processor design techniques, such as pipelining, superscalar, and VLIW, have dramatically decreased the average number of clock cycles per instruction. As a result, each execution cycle has become more significant to overall system performance. To maximize the effectiveness of each cycle, one must …
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Parallel pipelined VLSI arrays for real-time image processing
… which exploits functional parallelism and data pipelining simultaneously. The presentation is divided into three parts: the first discusses graphical representation for general image processing algorithms, taking into account the nature of the data flow in real-time systems. The conditions for …
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Pipelined Apache HTTP Server
… short because of unbalanced request phases and pipelining overhead.
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Virtual matched filtering : a new hybrid CDMA code acquisition technique under Doppler and higher loads
… Solomon adaptive error/erasure decoding, and pipelining to provide the minimum possible acquisition time in severe overload CDMA and carrier offsets conditions. The overall implementation is equivalent to a very long physical matched filter but is relatively immune to the Doppler degradation. …
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A 1.7GS/s SAR ADC in 28nm CMOS
… focus of the thesis is the leveraging of the pipelining, passive residue transfer, and partial interleaving techniques to increase sample rate of the ADC. The first chapter explains the motivation for increasing the single channel ADC speed as well as the operation of the SAR ADC and pipelined …
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CAD for a 3-dimensional FPGA
… This work also proposes a technique called I/O pipelining which pipelines the primary inputs and outputs of the FPGA through unused registers. This 3-D architecture and I/O pipelining technique have not been found in any of the works proposed so far, in the area of 3-D FPGA design. It is shown …
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